Lines Matching refs:pio
171 enum at91_mux (*get_periph)(void __iomem *pio, unsigned mask);
172 void (*mux_A_periph)(void __iomem *pio, unsigned mask);
173 void (*mux_B_periph)(void __iomem *pio, unsigned mask);
174 void (*mux_C_periph)(void __iomem *pio, unsigned mask);
175 void (*mux_D_periph)(void __iomem *pio, unsigned mask);
176 bool (*get_deglitch)(void __iomem *pio, unsigned pin);
177 void (*set_deglitch)(void __iomem *pio, unsigned mask, bool is_on);
178 bool (*get_debounce)(void __iomem *pio, unsigned pin, u32 *div);
179 void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32 div);
180 bool (*get_pulldown)(void __iomem *pio, unsigned pin);
181 void (*set_pulldown)(void __iomem *pio, unsigned mask, bool is_on);
182 bool (*get_schmitt_trig)(void __iomem *pio, unsigned pin);
183 void (*disable_schmitt_trig)(void __iomem *pio, unsigned mask);
184 unsigned (*get_drivestrength)(void __iomem *pio, unsigned pin);
185 void (*set_drivestrength)(void __iomem *pio, unsigned pin,
187 unsigned (*get_slewrate)(void __iomem *pio, unsigned pin);
188 void (*set_slewrate)(void __iomem *pio, unsigned pin, u32 slewrate);
384 static void at91_mux_disable_interrupt(void __iomem *pio, unsigned mask)
386 writel_relaxed(mask, pio + PIO_IDR);
389 static unsigned at91_mux_get_pullup(void __iomem *pio, unsigned pin)
391 return !((readl_relaxed(pio + PIO_PUSR) >> pin) & 0x1);
394 static void at91_mux_set_pullup(void __iomem *pio, unsigned mask, bool on)
397 writel_relaxed(mask, pio + PIO_PPDDR);
399 writel_relaxed(mask, pio + (on ? PIO_PUER : PIO_PUDR));
402 static bool at91_mux_get_output(void __iomem *pio, unsigned int pin, bool *val)
404 *val = (readl_relaxed(pio + PIO_ODSR) >> pin) & 0x1;
405 return (readl_relaxed(pio + PIO_OSR) >> pin) & 0x1;
408 static void at91_mux_set_output(void __iomem *pio, unsigned int mask,
411 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));
412 writel_relaxed(mask, pio + (is_on ? PIO_OER : PIO_ODR));
415 static unsigned at91_mux_get_multidrive(void __iomem *pio, unsigned pin)
417 return (readl_relaxed(pio + PIO_MDSR) >> pin) & 0x1;
420 static void at91_mux_set_multidrive(void __iomem *pio, unsigned mask, bool on)
422 writel_relaxed(mask, pio + (on ? PIO_MDER : PIO_MDDR));
425 static void at91_mux_set_A_periph(void __iomem *pio, unsigned mask)
427 writel_relaxed(mask, pio + PIO_ASR);
430 static void at91_mux_set_B_periph(void __iomem *pio, unsigned mask)
432 writel_relaxed(mask, pio + PIO_BSR);
435 static void at91_mux_pio3_set_A_periph(void __iomem *pio, unsigned mask)
438 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask,
439 pio + PIO_ABCDSR1);
440 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask,
441 pio + PIO_ABCDSR2);
444 static void at91_mux_pio3_set_B_periph(void __iomem *pio, unsigned mask)
446 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask,
447 pio + PIO_ABCDSR1);
448 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) & ~mask,
449 pio + PIO_ABCDSR2);
452 static void at91_mux_pio3_set_C_periph(void __iomem *pio, unsigned mask)
454 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) & ~mask, pio + PIO_ABCDSR1);
455 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
458 static void at91_mux_pio3_set_D_periph(void __iomem *pio, unsigned mask)
460 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR1) | mask, pio + PIO_ABCDSR1);
461 writel_relaxed(readl_relaxed(pio + PIO_ABCDSR2) | mask, pio + PIO_ABCDSR2);
464 static enum at91_mux at91_mux_pio3_get_periph(void __iomem *pio, unsigned mask)
468 if (readl_relaxed(pio + PIO_PSR) & mask)
471 select = !!(readl_relaxed(pio + PIO_ABCDSR1) & mask);
472 select |= (!!(readl_relaxed(pio + PIO_ABCDSR2) & mask) << 1);
477 static enum at91_mux at91_mux_get_periph(void __iomem *pio, unsigned mask)
481 if (readl_relaxed(pio + PIO_PSR) & mask)
484 select = readl_relaxed(pio + PIO_ABSR) & mask;
489 static bool at91_mux_get_deglitch(void __iomem *pio, unsigned pin)
491 return (readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1;
494 static void at91_mux_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
496 writel_relaxed(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
499 static bool at91_mux_pio3_get_deglitch(void __iomem *pio, unsigned pin)
501 if ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1)
502 return !((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);
507 static void at91_mux_pio3_set_deglitch(void __iomem *pio, unsigned mask, bool is_on)
510 writel_relaxed(mask, pio + PIO_IFSCDR);
511 at91_mux_set_deglitch(pio, mask, is_on);
514 static bool at91_mux_pio3_get_debounce(void __iomem *pio, unsigned pin, u32 *div)
516 *div = readl_relaxed(pio + PIO_SCDR);
518 return ((readl_relaxed(pio + PIO_IFSR) >> pin) & 0x1) &&
519 ((readl_relaxed(pio + PIO_IFSCSR) >> pin) & 0x1);
522 static void at91_mux_pio3_set_debounce(void __iomem *pio, unsigned mask,
526 writel_relaxed(mask, pio + PIO_IFSCER);
527 writel_relaxed(div & PIO_SCDR_DIV, pio + PIO_SCDR);
528 writel_relaxed(mask, pio + PIO_IFER);
530 writel_relaxed(mask, pio + PIO_IFSCDR);
533 static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin)
535 return !((readl_relaxed(pio + PIO_PPDSR) >> pin) & 0x1);
538 static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on)
541 writel_relaxed(mask, pio + PIO_PUDR);
543 writel_relaxed(mask, pio + (is_on ? PIO_PPDER : PIO_PPDDR));
546 static void at91_mux_pio3_disable_schmitt_trig(void __iomem *pio, unsigned mask)
548 writel_relaxed(readl_relaxed(pio + PIO_SCHMITT) | mask, pio + PIO_SCHMITT);
551 static bool at91_mux_pio3_get_schmitt_trig(void __iomem *pio, unsigned pin)
553 return (readl_relaxed(pio + PIO_SCHMITT) >> pin) & 0x1;
565 static unsigned at91_mux_sama5d3_get_drivestrength(void __iomem *pio,
568 unsigned tmp = read_drive_strength(pio +
579 static unsigned at91_mux_sam9x5_get_drivestrength(void __iomem *pio,
582 unsigned tmp = read_drive_strength(pio +
592 static unsigned at91_mux_sam9x60_get_drivestrength(void __iomem *pio,
595 unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1);
603 static unsigned at91_mux_sam9x60_get_slewrate(void __iomem *pio, unsigned pin)
605 unsigned tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
624 static void at91_mux_sama5d3_set_drivestrength(void __iomem *pio, unsigned pin,
632 set_drive_strength(pio + sama5d3_get_drive_register(pin), pin, setting);
635 static void at91_mux_sam9x5_set_drivestrength(void __iomem *pio, unsigned pin,
646 set_drive_strength(pio + at91sam9x5_get_drive_register(pin), pin,
650 static void at91_mux_sam9x60_set_drivestrength(void __iomem *pio, unsigned pin,
660 tmp = readl_relaxed(pio + SAM9X60_PIO_DRIVER1);
668 writel_relaxed(tmp, pio + SAM9X60_PIO_DRIVER1);
671 static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin,
679 tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
686 writel_relaxed(tmp, pio + SAM9X60_PIO_SLEWR);
760 dev_dbg(dev, "pio%c%d configured as periph%c with conf = 0x%lx\n",
763 dev_dbg(dev, "pio%c%d configured as gpio with conf = 0x%lx\n",
804 dev_err(info->dev, "%s: pin conf %d mux_id %d not supported for pio%c%d\n",
812 static void at91_mux_gpio_disable(void __iomem *pio, unsigned mask)
814 writel_relaxed(mask, pio + PIO_PDR);
817 static void at91_mux_gpio_enable(void __iomem *pio, unsigned mask, bool input)
819 writel_relaxed(mask, pio + PIO_PER);
820 writel_relaxed(mask, pio + (input ? PIO_ODR : PIO_OER));
832 void __iomem *pio;
849 pio = pin_to_controller(info, pin->bank);
851 if (!pio)
855 at91_mux_disable_interrupt(pio, mask);
858 at91_mux_gpio_enable(pio, mask, 1);
861 info->ops->mux_A_periph(pio, mask);
864 info->ops->mux_B_periph(pio, mask);
869 info->ops->mux_C_periph(pio, mask);
874 info->ops->mux_D_periph(pio, mask);
878 at91_mux_gpio_disable(pio, mask);
966 void __iomem *pio;
973 pio = pin_to_controller(info, pin_to_bank(pin_id));
975 if (!pio)
980 if (at91_mux_get_multidrive(pio, pin))
983 if (at91_mux_get_pullup(pio, pin))
986 if (info->ops->get_deglitch && info->ops->get_deglitch(pio, pin))
988 if (info->ops->get_debounce && info->ops->get_debounce(pio, pin, &div))
990 if (info->ops->get_pulldown && info->ops->get_pulldown(pio, pin))
992 if (info->ops->get_schmitt_trig && info->ops->get_schmitt_trig(pio, pin))
995 *config |= (info->ops->get_drivestrength(pio, pin)
998 *config |= (info->ops->get_slewrate(pio, pin) << SLEWRATE_SHIFT);
999 if (at91_mux_get_output(pio, pin, &out))
1011 void __iomem *pio;
1022 pio = pin_to_controller(info, pin_to_bank(pin_id));
1024 if (!pio)
1033 at91_mux_set_output(pio, mask, config & OUTPUT,
1035 at91_mux_set_pullup(pio, mask, config & PULL_UP);
1036 at91_mux_set_multidrive(pio, mask, config & MULTI_DRIVE);
1038 info->ops->set_deglitch(pio, mask, config & DEGLITCH);
1040 info->ops->set_debounce(pio, mask, config & DEBOUNCE,
1043 info->ops->set_pulldown(pio, mask, config & PULL_DOWN);
1045 info->ops->disable_schmitt_trig(pio, mask);
1047 info->ops->set_drivestrength(pio, pin,
1051 info->ops->set_slewrate(pio, pin,
1388 pdesc->name = kasprintf(GFP_KERNEL, "pio%c%d", i + 'A', j);
1415 void __iomem *pio = at91_gpio->regbase;
1419 osr = readl_relaxed(pio + PIO_OSR);
1429 void __iomem *pio = at91_gpio->regbase;
1432 writel_relaxed(mask, pio + PIO_ODR);
1439 void __iomem *pio = at91_gpio->regbase;
1443 pdsr = readl_relaxed(pio + PIO_PDSR);
1451 void __iomem *pio = at91_gpio->regbase;
1454 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));
1461 void __iomem *pio = at91_gpio->regbase;
1468 writel_relaxed(set_mask, pio + PIO_SODR);
1469 writel_relaxed(clear_mask, pio + PIO_CODR);
1476 void __iomem *pio = at91_gpio->regbase;
1479 writel_relaxed(mask, pio + (val ? PIO_SODR : PIO_CODR));
1480 writel_relaxed(mask, pio + PIO_OER);
1491 void __iomem *pio = at91_gpio->regbase;
1497 mode = at91_gpio->ops->get_periph(pio, mask);
1503 readl_relaxed(pio + PIO_OSR) & mask ?
1506 readl_relaxed(pio + PIO_PDSR) & mask ?
1535 void __iomem *pio = at91_gpio->regbase;
1538 if (pio)
1539 writel_relaxed(mask, pio + PIO_IDR);
1545 void __iomem *pio = at91_gpio->regbase;
1548 if (pio)
1549 writel_relaxed(mask, pio + PIO_IER);
1567 void __iomem *pio = at91_gpio->regbase;
1573 writel_relaxed(mask, pio + PIO_ESR);
1574 writel_relaxed(mask, pio + PIO_REHLSR);
1578 writel_relaxed(mask, pio + PIO_ESR);
1579 writel_relaxed(mask, pio + PIO_FELLSR);
1583 writel_relaxed(mask, pio + PIO_LSR);
1584 writel_relaxed(mask, pio + PIO_FELLSR);
1588 writel_relaxed(mask, pio + PIO_LSR);
1589 writel_relaxed(mask, pio + PIO_REHLSR);
1597 writel_relaxed(mask, pio + PIO_AIMDR);
1606 writel_relaxed(mask, pio + PIO_AIMER);
1645 void __iomem *pio;
1650 pio = gpio_chips[i]->regbase;
1652 backups[i] = readl_relaxed(pio + PIO_IMR);
1653 writel_relaxed(backups[i], pio + PIO_IDR);
1654 writel_relaxed(wakeups[i], pio + PIO_IER);
1669 void __iomem *pio;
1674 pio = gpio_chips[i]->regbase;
1679 writel_relaxed(wakeups[i], pio + PIO_IDR);
1680 writel_relaxed(backups[i], pio + PIO_IER);
1693 void __iomem *pio = at91_gpio->regbase;
1703 isr = readl_relaxed(pio + PIO_ISR) & readl_relaxed(pio + PIO_IMR);
1708 pio = at91_gpio->regbase;
1894 names[i] = devm_kasprintf(&pdev->dev, GFP_KERNEL, "pio%c%d", alias_idx + 'A', i);