Lines Matching defs:lg
207 static struct intel_community *lp_get_community(struct intel_pinctrl *lg,
213 for (i = 0; i < lg->ncommunities; i++) {
214 comm = &lg->communities[i];
225 struct intel_pinctrl *lg = gpiochip_get_data(chip);
229 comm = lp_get_community(lg, offset);
245 static bool lp_gpio_acpi_use(struct intel_pinctrl *lg, unsigned int pin)
249 acpi_use = lp_gpio_reg(&lg->chip, pin, LP_ACPI_OWNED);
275 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
277 return lg->soc->ngroups;
283 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
285 return lg->soc->groups[selector].name;
293 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
295 *pins = lg->soc->groups[selector].pins;
296 *num_pins = lg->soc->groups[selector].npins;
304 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
305 void __iomem *reg = lp_gpio_reg(&lg->chip, pin, LP_CONFIG1);
306 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2);
319 if (lp_gpio_acpi_use(lg, pin))
332 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
334 return lg->soc->nfunctions;
340 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
342 return lg->soc->functions[selector].name;
350 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
352 *groups = lg->soc->functions[selector].groups;
353 *num_groups = lg->soc->functions[selector].ngroups;
361 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
362 const struct intel_pingroup *grp = &lg->soc->groups[group];
366 raw_spin_lock_irqsave(&lg->lock, flags);
370 void __iomem *reg = lp_gpio_reg(&lg->chip, grp->pins[i], LP_CONFIG1);
384 raw_spin_unlock_irqrestore(&lg->lock, flags);
403 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
404 void __iomem *reg = lp_gpio_reg(&lg->chip, pin, LP_CONFIG1);
405 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2);
409 pm_runtime_get(lg->dev);
411 raw_spin_lock_irqsave(&lg->lock, flags);
420 dev_warn(lg->dev, FW_BUG "pin %u forcibly reconfigured as GPIO\n", pin);
426 raw_spin_unlock_irqrestore(&lg->lock, flags);
435 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
436 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2);
439 raw_spin_lock_irqsave(&lg->lock, flags);
444 raw_spin_unlock_irqrestore(&lg->lock, flags);
446 pm_runtime_put(lg->dev);
453 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
454 void __iomem *reg = lp_gpio_reg(&lg->chip, pin, LP_CONFIG1);
458 raw_spin_lock_irqsave(&lg->lock, flags);
471 WARN(lp_gpio_ioxapic_use(&lg->chip, pin),
476 raw_spin_unlock_irqrestore(&lg->lock, flags);
494 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
495 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2);
501 raw_spin_lock_irqsave(&lg->lock, flags);
503 raw_spin_unlock_irqrestore(&lg->lock, flags);
536 struct intel_pinctrl *lg = pinctrl_dev_get_drvdata(pctldev);
537 void __iomem *conf2 = lp_gpio_reg(&lg->chip, pin, LP_CONFIG2);
543 raw_spin_lock_irqsave(&lg->lock, flags);
573 raw_spin_unlock_irqrestore(&lg->lock, flags);
599 struct intel_pinctrl *lg = gpiochip_get_data(chip);
603 raw_spin_lock_irqsave(&lg->lock, flags);
610 raw_spin_unlock_irqrestore(&lg->lock, flags);
640 struct intel_pinctrl *lg = gpiochip_get_data(gc);
647 for (base = 0; base < lg->chip.ngpio; base += 32) {
648 reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT);
649 ena = lp_gpio_reg(&lg->chip, base, LP_INT_ENABLE);
657 irq = irq_find_mapping(lg->chip.irq.domain, base + pin);
667 struct intel_pinctrl *lg = gpiochip_get_data(gc);
669 void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_STAT);
672 raw_spin_lock_irqsave(&lg->lock, flags);
674 raw_spin_unlock_irqrestore(&lg->lock, flags);
688 struct intel_pinctrl *lg = gpiochip_get_data(gc);
690 void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE);
693 raw_spin_lock_irqsave(&lg->lock, flags);
695 raw_spin_unlock_irqrestore(&lg->lock, flags);
701 struct intel_pinctrl *lg = gpiochip_get_data(gc);
703 void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE);
706 raw_spin_lock_irqsave(&lg->lock, flags);
708 raw_spin_unlock_irqrestore(&lg->lock, flags);
714 struct intel_pinctrl *lg = gpiochip_get_data(gc);
716 void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_CONFIG1);
720 if (hwirq >= lg->chip.ngpio)
724 if (lp_gpio_acpi_use(lg, hwirq)) {
725 dev_err(lg->dev, "pin %u can't be used as IRQ\n", hwirq);
729 raw_spin_lock_irqsave(&lg->lock, flags);
755 raw_spin_unlock_irqrestore(&lg->lock, flags);
773 struct intel_pinctrl *lg = gpiochip_get_data(chip);
777 for (base = 0; base < lg->chip.ngpio; base += 32) {
779 reg = lp_gpio_reg(&lg->chip, base, LP_INT_ENABLE);
782 reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT);
791 struct intel_pinctrl *lg = gpiochip_get_data(chip);
792 struct device *dev = lg->dev;
795 ret = gpiochip_add_pin_range(chip, dev_name(dev), 0, 0, lg->soc->npins);
805 struct intel_pinctrl *lg;
817 lg = devm_kzalloc(dev, sizeof(*lg), GFP_KERNEL);
818 if (!lg)
821 lg->dev = dev;
822 lg->soc = soc;
824 lg->ncommunities = lg->soc->ncommunities;
825 lg->communities = devm_kcalloc(dev, lg->ncommunities,
826 sizeof(*lg->communities), GFP_KERNEL);
827 if (!lg->communities)
830 lg->pctldesc = lptlp_pinctrl_desc;
831 lg->pctldesc.name = dev_name(dev);
832 lg->pctldesc.pins = lg->soc->pins;
833 lg->pctldesc.npins = lg->soc->npins;
835 lg->pctldev = devm_pinctrl_register(dev, &lg->pctldesc, lg);
836 if (IS_ERR(lg->pctldev)) {
838 return PTR_ERR(lg->pctldev);
841 platform_set_drvdata(pdev, lg);
855 for (i = 0; i < lg->soc->ncommunities; i++) {
856 struct intel_community *comm = &lg->communities[i];
858 *comm = lg->soc->communities[i];
864 raw_spin_lock_init(&lg->lock);
866 gc = &lg->chip;
902 ret = devm_gpiochip_add_data(dev, gc, lg);
931 struct intel_pinctrl *lg = dev_get_drvdata(dev);
932 struct gpio_chip *chip = &lg->chip;