Lines Matching refs:value
574 static void chv_pctrl_writel(struct intel_pinctrl *pctrl, unsigned int offset, u32 value)
580 writel(value, reg);
601 static void chv_writel(struct intel_pinctrl *pctrl, unsigned int pin, unsigned int offset, u32 value)
606 writel(value, reg);
734 u32 value;
746 value = chv_readl(pctrl, pin, CHV_PADCTRL0);
748 value &= ~CHV_PADCTRL0_GPIOEN;
750 value &= ~CHV_PADCTRL0_PMODE_MASK;
751 value |= mode << CHV_PADCTRL0_PMODE_SHIFT;
752 chv_writel(pctrl, pin, CHV_PADCTRL0, value);
755 value = chv_readl(pctrl, pin, CHV_PADCTRL1) & ~CHV_PADCTRL1_INVRXTX_MASK;
757 value |= CHV_PADCTRL1_INVRXTX_TXENABLE;
758 chv_writel(pctrl, pin, CHV_PADCTRL1, value);
773 u32 value;
776 * One some devices the GPIO should output the inverted value from what
781 value = chv_readl(pctrl, offset, CHV_PADCTRL0);
782 if (value & CHV_PADCTRL0_GPIOEN)
785 value = chv_readl(pctrl, offset, CHV_PADCTRL1);
786 value &= ~CHV_PADCTRL1_INTWAKECFG_MASK;
787 value &= ~invrxtx_mask;
788 chv_writel(pctrl, offset, CHV_PADCTRL1, value);
797 u32 value;
802 value = chv_readl(pctrl, offset, CHV_PADCTRL0);
803 if (!(value & CHV_PADCTRL0_GPIOEN)) {
823 value = chv_readl(pctrl, offset, CHV_PADCTRL0);
829 if ((value & CHV_PADCTRL0_GPIOCFG_MASK) ==
831 value &= ~CHV_PADCTRL0_GPIOCFG_MASK;
832 value |= CHV_PADCTRL0_GPIOCFG_GPI << CHV_PADCTRL0_GPIOCFG_SHIFT;
836 value |= CHV_PADCTRL0_GPIOEN;
837 chv_writel(pctrl, offset, CHV_PADCTRL0, value);
1182 static void chv_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
1192 if (value)
1227 int value)
1229 chv_gpio_set(chip, offset, value);
1266 u32 value, intr_line;
1275 value = chv_pctrl_readl(pctrl, CHV_INTMASK);
1277 value &= ~BIT(intr_line);
1279 value |= BIT(intr_line);
1280 chv_pctrl_writel(pctrl, CHV_INTMASK, value);
1314 u32 intsel, value;
1321 value = chv_readl(pctrl, pin, CHV_PADCTRL1);
1322 if (value & CHV_PADCTRL1_INTWAKECFG_LEVEL)
1345 u32 value;
1363 value = chv_readl(pctrl, pin, CHV_PADCTRL1);
1364 value &= ~CHV_PADCTRL1_INTWAKECFG_MASK;
1365 value &= ~CHV_PADCTRL1_INVRXTX_MASK;
1369 value |= CHV_PADCTRL1_INTWAKECFG_BOTH;
1371 value |= CHV_PADCTRL1_INTWAKECFG_RISING;
1373 value |= CHV_PADCTRL1_INTWAKECFG_FALLING;
1375 value |= CHV_PADCTRL1_INTWAKECFG_LEVEL;
1377 value |= CHV_PADCTRL1_INVRXTX_RXDATA;
1380 chv_writel(pctrl, pin, CHV_PADCTRL1, value);
1383 value = chv_readl(pctrl, pin, CHV_PADCTRL0);
1384 value &= CHV_PADCTRL0_INTSEL_MASK;
1385 value >>= CHV_PADCTRL0_INTSEL_SHIFT;
1387 cctx->intr_lines[value] = pin;
1602 acpi_physical_address address, u32 bits, u64 *value,
1612 chv_pctrl_writel(pctrl, address, *value);
1614 *value = chv_pctrl_readl(pctrl, address);