Lines Matching refs:pinctrl
28 #include <linux/pinctrl/pinctrl.h>
29 #include <linux/pinctrl/pinmux.h>
30 #include <linux/pinctrl/pinconf.h>
31 #include <linux/pinctrl/pinconf-generic.h>
33 #include "../pinctrl-utils.h"
94 * Cygnus IOMUX pinctrl core
707 struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
709 return pinctrl->num_groups;
715 struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
717 return pinctrl->groups[selector].name;
724 struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
726 *pins = pinctrl->groups[selector].pins;
727 *num_pins = pinctrl->groups[selector].num_pins;
749 struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
751 return pinctrl->num_functions;
757 struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
759 return pinctrl->functions[selector].name;
767 struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
769 *groups = pinctrl->functions[selector].groups;
770 *num_groups = pinctrl->functions[selector].num_groups;
775 static int cygnus_pinmux_set(struct cygnus_pinctrl *pinctrl,
801 dev_err(pinctrl->dev,
803 dev_err(pinctrl->dev, "func:%s grp:%s\n",
818 spin_lock_irqsave(&pinctrl->lock, flags);
820 val = readl(pinctrl->base0 + grp->mux.offset);
823 writel(val, pinctrl->base0 + grp->mux.offset);
825 spin_unlock_irqrestore(&pinctrl->lock, flags);
833 struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
835 &pinctrl->functions[func_select];
836 const struct cygnus_pin_group *grp = &pinctrl->groups[grp_select];
844 return cygnus_pinmux_set(pinctrl, func, grp, pinctrl->mux_log);
851 struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
860 spin_lock_irqsave(&pinctrl->lock, flags);
862 val = readl(pinctrl->base1 + mux->offset);
864 writel(val, pinctrl->base1 + mux->offset);
866 spin_unlock_irqrestore(&pinctrl->lock, flags);
879 struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
887 spin_lock_irqsave(&pinctrl->lock, flags);
889 val = readl(pinctrl->base1 + mux->offset);
891 writel(val, pinctrl->base1 + mux->offset);
893 spin_unlock_irqrestore(&pinctrl->lock, flags);
915 static int cygnus_mux_log_init(struct cygnus_pinctrl *pinctrl)
920 pinctrl->mux_log = devm_kcalloc(pinctrl->dev, CYGNUS_NUM_IOMUX,
923 if (!pinctrl->mux_log)
928 log = &pinctrl->mux_log[i * CYGNUS_NUM_MUX_PER_REG
942 struct cygnus_pinctrl *pinctrl;
947 pinctrl = devm_kzalloc(&pdev->dev, sizeof(*pinctrl), GFP_KERNEL);
948 if (!pinctrl)
951 pinctrl->dev = &pdev->dev;
952 platform_set_drvdata(pdev, pinctrl);
953 spin_lock_init(&pinctrl->lock);
955 pinctrl->base0 = devm_platform_ioremap_resource(pdev, 0);
956 if (IS_ERR(pinctrl->base0)) {
958 return PTR_ERR(pinctrl->base0);
961 pinctrl->base1 = devm_platform_ioremap_resource(pdev, 1);
962 if (IS_ERR(pinctrl->base1)) {
964 return PTR_ERR(pinctrl->base1);
967 ret = cygnus_mux_log_init(pinctrl);
983 pinctrl->groups = cygnus_pin_groups;
984 pinctrl->num_groups = ARRAY_SIZE(cygnus_pin_groups);
985 pinctrl->functions = cygnus_pin_functions;
986 pinctrl->num_functions = ARRAY_SIZE(cygnus_pin_functions);
990 pinctrl->pctl = devm_pinctrl_register(&pdev->dev, &cygnus_pinctrl_desc,
991 pinctrl);
992 if (IS_ERR(pinctrl->pctl)) {
993 dev_err(&pdev->dev, "unable to register Cygnus IOMUX pinctrl\n");
994 return PTR_ERR(pinctrl->pctl);