Lines Matching defs:pins
11 * The ASPEED SoCs provide typically more than 200 pins for GPIO and other
57 * bit in the STRAP register. The ACPI bit configures signals on pins in
107 * Other video-input-related pins require an explicit state in SCU90[5:4], e.g.
145 * pins in the function's group to disable the higher-priority signals such
149 * it 18 pins of five priority levels, however the 18 pins only use three of
152 * Ultimately the requirement to control pins in the examples above drive the
218 * concern for the function of already allocated pins, if pin groups are
222 * Conversely, failing to allocate all pins in a group indicates some bits (as
223 * well as pins) required for the group's configuration will already be in use,
235 * The complexity of configuring the mux combined with the scale of the pins
312 * .pins = &(group_pins_MAC1LINK)[0],
602 * list with a single expression (SE) and a single group (SG) of pins.
620 * Similar to the above, but for pins with a single expression (SE) and
621 * multiple groups (MG) of pins.
636 * Similar to the above, but for pins with a dual expressions (DE) and
637 * and a single group (SG) of pins.
756 const unsigned int *pins;
762 .pins = &(GROUP_SYM(name_))[0], \