Lines Matching defs:gtr_phy
273 static inline u32 xpsgtr_read_phy(struct xpsgtr_phy *gtr_phy, u32 reg)
275 void __iomem *addr = gtr_phy->dev->serdes
276 + gtr_phy->lane * PHY_REG_OFFSET + reg;
281 static inline void xpsgtr_write_phy(struct xpsgtr_phy *gtr_phy,
284 void __iomem *addr = gtr_phy->dev->serdes
285 + gtr_phy->lane * PHY_REG_OFFSET + reg;
290 static inline void xpsgtr_clr_set_phy(struct xpsgtr_phy *gtr_phy,
293 void __iomem *addr = gtr_phy->dev->serdes
294 + gtr_phy->lane * PHY_REG_OFFSET + reg;
306 struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy);
307 struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
314 u32 reg = xpsgtr_read_phy(gtr_phy, L0_PLL_STATUS_READ_1);
332 gtr_phy->lane, gtr_phy->type, gtr_phy->protocol);
338 static void xpsgtr_configure_pll(struct xpsgtr_phy *gtr_phy)
343 ssc = gtr_phy->dev->refclk_sscs[gtr_phy->refclk];
346 xpsgtr_clr_set(gtr_phy->dev, PLL_REF_SEL(gtr_phy->lane),
350 if (gtr_phy->refclk != gtr_phy->lane) {
352 xpsgtr_clr_set(gtr_phy->dev, L0_Ln_REF_CLK_SEL(gtr_phy->lane),
353 L0_REF_CLK_SEL_MASK, 1 << gtr_phy->refclk);
357 xpsgtr_clr_set_phy(gtr_phy, L0_PLL_SS_STEP_SIZE_0_LSB,
362 xpsgtr_clr_set_phy(gtr_phy, L0_PLL_SS_STEP_SIZE_1,
367 xpsgtr_clr_set_phy(gtr_phy, L0_PLL_SS_STEP_SIZE_2,
371 xpsgtr_clr_set_phy(gtr_phy, L0_PLL_SS_STEPS_0_LSB,
375 xpsgtr_clr_set_phy(gtr_phy, L0_PLL_SS_STEPS_1_MSB,
381 xpsgtr_clr_set_phy(gtr_phy, L0_PLL_SS_STEP_SIZE_3_MSB,
387 static void xpsgtr_lane_set_protocol(struct xpsgtr_phy *gtr_phy)
389 struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
390 u8 protocol = gtr_phy->protocol;
392 switch (gtr_phy->lane) {
414 static void xpsgtr_bypass_scrambler_8b10b(struct xpsgtr_phy *gtr_phy)
416 xpsgtr_write_phy(gtr_phy, L0_TM_DIG_6, L0_TM_DIS_DESCRAMBLE_DECODER);
417 xpsgtr_write_phy(gtr_phy, L0_TX_DIG_61, L0_TM_DISABLE_SCRAMBLE_ENCODER);
421 static void xpsgtr_phy_init_dp(struct xpsgtr_phy *gtr_phy)
423 xpsgtr_write_phy(gtr_phy, L0_TXPMD_TM_45,
429 xpsgtr_write_phy(gtr_phy, L0_TX_ANA_TM_118,
434 static void xpsgtr_phy_init_sata(struct xpsgtr_phy *gtr_phy)
436 struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
438 xpsgtr_bypass_scrambler_8b10b(gtr_phy);
440 writel(gtr_phy->lane, gtr_dev->siou + SATA_CONTROL_OFFSET);
444 static void xpsgtr_phy_init_sgmii(struct xpsgtr_phy *gtr_phy)
446 struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
447 u32 mask = PROT_BUS_WIDTH_MASK(gtr_phy->lane);
448 u32 val = PROT_BUS_WIDTH_10 << PROT_BUS_WIDTH_SHIFT(gtr_phy->lane);
454 xpsgtr_bypass_scrambler_8b10b(gtr_phy);
458 static void xpsgtr_phy_configure_dp(struct xpsgtr_phy *gtr_phy, unsigned int pre,
474 xpsgtr_write_phy(gtr_phy, L0_TXPMD_TM_48, voltage_swing[pre][voltage]);
475 xpsgtr_write_phy(gtr_phy, L0_TX_ANA_TM_18, pre_emphasis[pre][voltage]);
482 static bool xpsgtr_phy_init_required(struct xpsgtr_phy *gtr_phy)
488 * except when gtr_phy->skip_phy_init is false (this happens when FPD is
491 if (gtr_phy->protocol == ICM_PROTOCOL_USB && gtr_phy->skip_phy_init)
502 static int xpsgtr_phy_tx_term_fix(struct xpsgtr_phy *gtr_phy)
504 struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
522 xpsgtr_lane_set_protocol(gtr_phy);
567 struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy);
568 struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
574 if (!xpsgtr_phy_init_required(gtr_phy))
578 ret = xpsgtr_phy_tx_term_fix(gtr_phy);
586 xpsgtr_write_phy(gtr_phy, L0_TM_PLL_DIG_37, L0_TM_COARSE_CODE_LIMIT);
592 xpsgtr_configure_pll(gtr_phy);
593 xpsgtr_lane_set_protocol(gtr_phy);
595 switch (gtr_phy->protocol) {
597 xpsgtr_phy_init_dp(gtr_phy);
601 xpsgtr_phy_init_sata(gtr_phy);
605 xpsgtr_phy_init_sgmii(gtr_phy);
616 struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy);
618 gtr_phy->skip_phy_init = false;
625 struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy);
633 if (gtr_phy->protocol != ICM_PROTOCOL_DP ||
634 gtr_phy->type == XPSGTR_TYPE_DP_0)
642 struct xpsgtr_phy *gtr_phy = phy_get_drvdata(phy);
644 if (gtr_phy->protocol != ICM_PROTOCOL_DP)
647 xpsgtr_phy_configure_dp(gtr_phy, opts->dp.pre[0], opts->dp.voltage[0]);
665 static int xpsgtr_set_lane_type(struct xpsgtr_phy *gtr_phy, u8 phy_type,
680 gtr_phy->protocol = ICM_PROTOCOL_SATA;
691 gtr_phy->protocol = ICM_PROTOCOL_USB;
702 gtr_phy->protocol = ICM_PROTOCOL_DP;
715 gtr_phy->protocol = ICM_PROTOCOL_PCIE;
728 gtr_phy->protocol = ICM_PROTOCOL_SGMII;
738 gtr_phy->type = phy_types[phy_instance];
761 struct xpsgtr_phy *gtr_phy;
784 gtr_phy = >r_dev->phys[phy_lane];
788 ret = xpsgtr_set_lane_type(gtr_phy, phy_type, phy_instance);
801 gtr_phy->refclk = refclk;
808 if (icm_matrix[phy_lane][i] == gtr_phy->type)
809 return gtr_phy->phy;
851 /* Update the skip_phy_init for all gtr_phy instances. */
949 struct xpsgtr_phy *gtr_phy = >r_dev->phys[port];
952 gtr_phy->lane = port;
953 gtr_phy->dev = gtr_dev;
961 gtr_phy->phy = phy;
962 phy_set_drvdata(phy, gtr_phy);