Lines Matching defs:ti_pipe3_readl
288 static inline u32 ti_pipe3_readl(void __iomem *addr, unsigned offset)
394 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
412 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
417 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
422 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
427 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION4);
432 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION3);
447 val = ti_pipe3_readl(phy->phy_rx, PIPE3_PHY_RX_ANA_PROGRAMMABILITY);
452 val = ti_pipe3_readl(phy->phy_rx, PIPE3_PHY_RX_DIGITAL_MODES);
467 val = ti_pipe3_readl(phy->phy_rx, PIPE3_PHY_RX_TRIM);
472 val = ti_pipe3_readl(phy->phy_rx, PIPE3_PHY_RX_DLL);
477 val = ti_pipe3_readl(phy->phy_rx, PIPE3_PHY_RX_EQUALIZER);
488 val = ti_pipe3_readl(phy->phy_rx,
521 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
529 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
560 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
568 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);