Lines Matching refs:value
264 u32 value;
280 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
281 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_MASK <<
283 value |= XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_VAL <<
285 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
287 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL5);
288 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_MASK <<
290 value |= XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_VAL <<
292 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL5);
294 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
295 value |= XUSB_PADCTL_UPHY_PLL_CTL1_PWR_OVRD;
296 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
298 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
299 value |= XUSB_PADCTL_UPHY_PLL_CTL2_CAL_OVRD;
300 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
302 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
303 value |= XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_OVRD;
304 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
306 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL4);
307 value &= ~((XUSB_PADCTL_UPHY_PLL_CTL4_TXCLKREF_SEL_MASK <<
311 value |= (XUSB_PADCTL_UPHY_PLL_CTL4_TXCLKREF_SEL_USB_VAL <<
314 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL4);
316 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
317 value &= ~((XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_MDIV_MASK <<
321 value |= XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL <<
323 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
325 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
326 value &= ~XUSB_PADCTL_UPHY_PLL_CTL1_IDDQ;
327 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
329 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
330 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL1_SLEEP_MASK <<
332 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
336 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL4);
337 value |= XUSB_PADCTL_UPHY_PLL_CTL4_REFCLKBUF_EN;
338 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL4);
340 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
341 value |= XUSB_PADCTL_UPHY_PLL_CTL2_CAL_EN;
342 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
347 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
348 if (value & XUSB_PADCTL_UPHY_PLL_CTL2_CAL_DONE)
359 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
360 value &= ~XUSB_PADCTL_UPHY_PLL_CTL2_CAL_EN;
361 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
366 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
367 if (!(value & XUSB_PADCTL_UPHY_PLL_CTL2_CAL_DONE))
378 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
379 value |= XUSB_PADCTL_UPHY_PLL_CTL1_ENABLE;
380 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
385 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
386 if (value & XUSB_PADCTL_UPHY_PLL_CTL1_LOCKDET_STATUS)
397 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
398 value |= XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_EN |
400 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
405 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
406 if (value & XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_DONE)
417 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
418 value &= ~XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_EN;
419 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
424 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
425 if (!(value & XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_DONE))
436 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
437 value &= ~XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_CLK_EN;
438 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
442 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
443 value &= ~XUSB_PADCTL_UPHY_PLL_CTL1_PWR_OVRD;
444 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
446 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
447 value &= ~XUSB_PADCTL_UPHY_PLL_CTL2_CAL_OVRD;
448 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2);
450 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
451 value &= ~XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_OVRD;
452 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8);
493 u32 value;
509 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
510 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_MASK <<
512 value |= XUSB_PADCTL_UPHY_PLL_CTL2_CAL_CTRL_VAL <<
514 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
516 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL5);
517 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_MASK <<
519 value |= XUSB_PADCTL_UPHY_PLL_CTL5_DCO_CTRL_VAL <<
521 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL5);
523 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);
524 value |= XUSB_PADCTL_UPHY_PLL_CTL1_PWR_OVRD;
525 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL1);
527 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
528 value |= XUSB_PADCTL_UPHY_PLL_CTL2_CAL_OVRD;
529 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
531 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL8);
532 value |= XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_OVRD;
533 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL8);
535 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL4);
536 value &= ~((XUSB_PADCTL_UPHY_PLL_CTL4_TXCLKREF_SEL_MASK <<
540 value |= XUSB_PADCTL_UPHY_PLL_CTL4_TXCLKREF_EN;
543 value |= (XUSB_PADCTL_UPHY_PLL_CTL4_TXCLKREF_SEL_USB_VAL <<
546 value |= (XUSB_PADCTL_UPHY_PLL_CTL4_TXCLKREF_SEL_SATA_VAL <<
549 value &= ~XUSB_PADCTL_UPHY_PLL_CTL4_XDIGCLK_EN;
550 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL4);
552 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);
553 value &= ~((XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_MDIV_MASK <<
559 value |= XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_USB_VAL <<
562 value |= XUSB_PADCTL_UPHY_PLL_CTL1_FREQ_NDIV_SATA_VAL <<
565 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL1);
567 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);
568 value &= ~XUSB_PADCTL_UPHY_PLL_CTL1_IDDQ;
569 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL1);
571 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);
572 value &= ~(XUSB_PADCTL_UPHY_PLL_CTL1_SLEEP_MASK <<
574 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL1);
578 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL4);
579 value |= XUSB_PADCTL_UPHY_PLL_CTL4_REFCLKBUF_EN;
580 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL4);
582 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
583 value |= XUSB_PADCTL_UPHY_PLL_CTL2_CAL_EN;
584 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
589 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
590 if (value & XUSB_PADCTL_UPHY_PLL_CTL2_CAL_DONE)
601 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
602 value &= ~XUSB_PADCTL_UPHY_PLL_CTL2_CAL_EN;
603 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
608 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
609 if (!(value & XUSB_PADCTL_UPHY_PLL_CTL2_CAL_DONE))
620 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);
621 value |= XUSB_PADCTL_UPHY_PLL_CTL1_ENABLE;
622 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL1);
627 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);
628 if (value & XUSB_PADCTL_UPHY_PLL_CTL1_LOCKDET_STATUS)
639 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL8);
640 value |= XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_EN |
642 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL8);
647 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL8);
648 if (value & XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_DONE)
659 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL8);
660 value &= ~XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_EN;
661 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL8);
666 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL8);
667 if (!(value & XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_DONE))
678 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL8);
679 value &= ~XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_CLK_EN;
680 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL8);
684 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL1);
685 value &= ~XUSB_PADCTL_UPHY_PLL_CTL1_PWR_OVRD;
686 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL1);
688 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
689 value &= ~XUSB_PADCTL_UPHY_PLL_CTL2_CAL_OVRD;
690 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
692 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_S0_CTL8);
693 value &= ~XUSB_PADCTL_UPHY_PLL_CTL8_RCAL_OVRD;
694 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_S0_CTL8);
732 u32 value;
739 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
740 value &= ~XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN;
741 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
745 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
746 value &= ~XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN_EARLY;
747 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
751 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
752 value &= ~XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_VCORE_DOWN;
753 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
762 u32 value;
772 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
773 value |= XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_VCORE_DOWN;
774 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
778 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
779 value |= XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN_EARLY;
780 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
784 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
785 value |= XUSB_PADCTL_ELPG_PROGRAM1_AUX_MUX_LP0_CLAMP_EN;
786 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
796 u32 value;
798 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL0(index));
800 value &= ~(XUSB_PADCTL_HSIC_PAD_CTL0_RPU_DATA0 |
805 value |= XUSB_PADCTL_HSIC_PAD_CTL0_RPD_DATA0 |
809 value &= ~(XUSB_PADCTL_HSIC_PAD_CTL0_RPD_DATA0 |
813 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL0(index));
823 u32 value, offset;
836 value = padctl_readl(padctl, offset);
838 value &= ~((XUSB_PADCTL_UPHY_MISC_PAD_CTL1_AUX_RX_IDLE_MODE_MASK <<
844 value |= (XUSB_PADCTL_UPHY_MISC_PAD_CTL1_AUX_RX_IDLE_MODE_VAL <<
850 padctl_writel(padctl, value, offset);
920 u32 value;
922 value = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX);
923 value &= ~(XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_MASK <<
925 value |= XUSB_PADCTL_USB2_PAD_MUX_USB2_BIAS_PAD_XUSB <<
927 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PAD_MUX);
942 u32 value;
946 value = padctl_readl(padctl, XUSB_PADCTL_USB2_VBUS_ID);
949 value |= XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_VBUS_ON;
950 value &= ~(XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_MASK <<
952 value |= XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_FLOATING <<
955 value &= ~XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_VBUS_ON;
958 padctl_writel(padctl, value, XUSB_PADCTL_USB2_VBUS_ID);
966 u32 value;
970 value = padctl_readl(padctl, XUSB_PADCTL_USB2_VBUS_ID);
973 if (value & XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_VBUS_ON) {
974 value &= ~XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_VBUS_ON;
975 padctl_writel(padctl, value, XUSB_PADCTL_USB2_VBUS_ID);
978 value = padctl_readl(padctl, XUSB_PADCTL_USB2_VBUS_ID);
981 value &= ~(XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_MASK <<
983 value |= XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_GROUNDED <<
986 value &= ~(XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_MASK <<
988 value |= XUSB_PADCTL_USB2_VBUS_ID_OVERRIDE_FLOATING <<
992 padctl_writel(padctl, value, XUSB_PADCTL_USB2_VBUS_ID);
1045 u32 value;
1057 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_MAP);
1058 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK(
1060 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(
1062 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_MAP);
1064 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
1065 value &= ~XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_VCORE_DOWN(
1067 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
1071 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
1072 value &= ~XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_CLAMP_EN_EARLY(
1074 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
1078 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
1079 value &= ~XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_CLAMP_EN(
1081 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
1084 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0);
1085 value &= ~((XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_SQUELCH_LEVEL_MASK <<
1089 value |= (XUSB_PADCTL_USB2_BIAS_PAD_CTL0_HS_DISCON_LEVEL_VAL <<
1093 value |=
1097 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0);
1099 value = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP);
1100 value &= ~XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_MASK(index);
1102 value |= XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_DISABLED(index);
1104 value |= XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_DEVICE(index);
1106 value |= XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_HOST(index);
1108 value |= XUSB_PADCTL_USB2_PORT_CAP_PORTX_CAP_OTG(index);
1109 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PORT_CAP);
1111 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));
1112 value &= ~((XUSB_PADCTL_USB2_OTG_PAD_CTL0_HS_CURR_LEVEL_MASK <<
1117 value |= (priv->fuse.hs_curr_level[index] +
1120 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));
1122 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));
1123 value &= ~((XUSB_PADCTL_USB2_OTG_PAD_CTL1_TERM_RANGE_ADJ_MASK <<
1130 value |= (priv->fuse.hs_term_range_adj <<
1134 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));
1136 value = padctl_readl(padctl,
1138 value &= ~(XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_LEV_MASK <<
1141 value |= XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL1_VREG_FIX18;
1143 value |=
1146 padctl_writel(padctl, value,
1167 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);
1168 value &= ~((XUSB_PADCTL_USB2_BIAS_PAD_CTL1_TRK_START_TIMER_MASK <<
1172 value |= (XUSB_PADCTL_USB2_BIAS_PAD_CTL1_TRK_START_TIMER_VAL <<
1176 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);
1178 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0);
1179 value &= ~XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD;
1180 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0);
1184 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);
1185 value &= ~XUSB_PADCTL_USB2_BIAS_PAD_CTL1_PD_TRK;
1186 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);
1209 u32 value;
1221 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
1222 value |= XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_CLAMP_EN_EARLY(
1224 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
1228 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
1229 value |= XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_CLAMP_EN(
1231 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
1235 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
1236 value |= XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_VCORE_DOWN(
1238 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
1240 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_MAP);
1241 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(port->usb3_port_fake,
1243 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_MAP);
1252 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0);
1253 value |= XUSB_PADCTL_USB2_BIAS_PAD_CTL0_PD;
1254 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0);
1385 u32 value;
1387 value = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX);
1388 value &= ~(XUSB_PADCTL_USB2_PAD_MUX_HSIC_PAD_TRK_MASK <<
1390 value |= XUSB_PADCTL_USB2_PAD_MUX_HSIC_PAD_TRK_XUSB <<
1392 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PAD_MUX);
1411 u32 value;
1421 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL1(index));
1422 value &= ~(XUSB_PADCTL_HSIC_PAD_CTL1_TX_RTUNEP_MASK <<
1424 value |= (hsic->tx_rtune_p <<
1426 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index));
1428 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL2(index));
1429 value &= ~((XUSB_PADCTL_HSIC_PAD_CTL2_RX_STROBE_TRIM_MASK <<
1433 value |= (hsic->rx_strobe_trim <<
1437 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL2(index));
1439 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL0(index));
1440 value &= ~(XUSB_PADCTL_HSIC_PAD_CTL0_RPU_DATA0 |
1452 value |= XUSB_PADCTL_HSIC_PAD_CTL0_RPD_DATA0 |
1455 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL0(index));
1461 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PAD_TRK_CTL);
1462 value &= ~((XUSB_PADCTL_HSIC_PAD_TRK_CTL_TRK_START_TIMER_MASK <<
1466 value |= (XUSB_PADCTL_HSIC_PAD_TRK_CTL_TRK_START_TIMER_VAL <<
1470 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PAD_TRK_CTL);
1474 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PAD_TRK_CTL);
1475 value &= ~XUSB_PADCTL_HSIC_PAD_TRK_CTL_PD_TRK;
1476 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PAD_TRK_CTL);
1495 u32 value;
1497 value = padctl_readl(padctl, XUSB_PADCTL_HSIC_PADX_CTL0(index));
1498 value |= XUSB_PADCTL_HSIC_PAD_CTL0_PD_RX_DATA0 |
1507 padctl_writel(padctl, value, XUSB_PADCTL_HSIC_PADX_CTL1(index));
1658 u32 value;
1667 value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX);
1668 value |= XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(lane->index);
1669 padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX);
1680 u32 value;
1682 value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX);
1683 value &= ~XUSB_PADCTL_USB3_PAD_MUX_PCIE_IDDQ_DISABLE(lane->index);
1684 padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX);
1829 u32 value;
1838 value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX);
1839 value |= XUSB_PADCTL_USB3_PAD_MUX_SATA_IDDQ_DISABLE(lane->index);
1840 padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX);
1851 u32 value;
1853 value = padctl_readl(padctl, XUSB_PADCTL_USB3_PAD_MUX);
1854 value &= ~XUSB_PADCTL_USB3_PAD_MUX_SATA_IDDQ_DISABLE(lane->index);
1855 padctl_writel(padctl, value, XUSB_PADCTL_USB3_PAD_MUX);
1991 u32 value;
1994 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_MAP);
1997 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index);
1999 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_INTERNAL(index);
2001 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK(index);
2002 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(index, usb3->port);
2003 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_MAP);
2014 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_USB3_PADX_ECTL1(index));
2015 value &= ~(XUSB_PADCTL_UPHY_USB3_PAD_ECTL1_TX_TERM_CTRL_MASK <<
2017 value |= XUSB_PADCTL_UPHY_USB3_PAD_ECTL1_TX_TERM_CTRL_VAL <<
2019 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_USB3_PADX_ECTL1(index));
2021 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_USB3_PADX_ECTL2(index));
2022 value &= ~(XUSB_PADCTL_UPHY_USB3_PAD_ECTL2_RX_CTLE_MASK <<
2024 value |= XUSB_PADCTL_UPHY_USB3_PAD_ECTL2_RX_CTLE_VAL <<
2026 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_USB3_PADX_ECTL2(index));
2031 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_USB3_PADX_ECTL4(index));
2032 value &= ~(XUSB_PADCTL_UPHY_USB3_PAD_ECTL4_RX_CDR_CTRL_MASK <<
2034 value |= XUSB_PADCTL_UPHY_USB3_PAD_ECTL4_RX_CDR_CTRL_VAL <<
2036 padctl_writel(padctl, value, XUSB_PADCTL_UPHY_USB3_PADX_ECTL4(index));
2052 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
2053 value &= ~XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_VCORE_DOWN(index);
2054 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
2058 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
2059 value &= ~XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_CLAMP_EN_EARLY(index);
2060 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
2064 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
2065 value &= ~XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_CLAMP_EN(index);
2066 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
2077 u32 value;
2079 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
2080 value |= XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_CLAMP_EN_EARLY(index);
2081 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
2085 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
2086 value |= XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_CLAMP_EN(index);
2087 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
2091 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM1);
2092 value |= XUSB_PADCTL_ELPG_PROGRAM1_SSPX_ELPG_VCORE_DOWN(index);
2093 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM1);
2102 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_MAP);
2103 value &= ~XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP_MASK(index);
2104 value |= XUSB_PADCTL_SS_PORT_MAP_PORTX_MAP(index, 0x7);
2105 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_MAP);
2136 u32 value;
2141 value = padctl_readl(padctl,
2144 if ((value & XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL0_ZIP) ||
2145 (value & XUSB_PADCTL_USB2_BATTERY_CHRG_OTGPAD_CTL0_ZIN)) {
2158 u32 value;
2161 err = tegra_fuse_readl(TEGRA_FUSE_SKU_CALIB_0, &value);
2167 (value >> FUSE_SKU_CALIB_HS_CURR_LEVEL_PADX_SHIFT(i)) &
2172 (value >> FUSE_SKU_CALIB_HS_TERM_RANGE_ADJ_SHIFT) &
2175 err = tegra_fuse_readl(TEGRA_FUSE_USB_CALIB_EXT_0, &value);
2180 (value >> FUSE_USB_CALIB_EXT_RPD_CTRL_SHIFT) &