Lines Matching refs:padctl
144 to_tegra186_xusb_padctl(struct tegra_xusb_padctl *padctl)
146 return container_of(padctl, struct tegra186_xusb_padctl, base);
188 static void tegra186_utmi_bias_pad_power_on(struct tegra_xusb_padctl *padctl)
190 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);
191 struct device *dev = padctl->dev;
195 mutex_lock(&padctl->lock);
198 mutex_unlock(&padctl->lock);
206 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);
211 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);
213 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL0);
217 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL0);
221 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);
223 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);
225 mutex_unlock(&padctl->lock);
228 static void tegra186_utmi_bias_pad_power_off(struct tegra_xusb_padctl *padctl)
230 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);
233 mutex_lock(&padctl->lock);
236 mutex_unlock(&padctl->lock);
241 mutex_unlock(&padctl->lock);
245 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);
247 padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1);
251 mutex_unlock(&padctl->lock);
257 struct tegra_xusb_padctl *padctl = lane->pad->padctl;
259 struct device *dev = padctl->dev;
266 port = tegra_xusb_find_usb2_port(padctl, index);
272 tegra186_utmi_bias_pad_power_on(padctl);
276 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));
278 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));
280 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));
282 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));
288 struct tegra_xusb_padctl *padctl = lane->pad->padctl;
295 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));
297 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));
299 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));
301 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));
305 tegra186_utmi_bias_pad_power_off(padctl);
308 static int tegra186_xusb_padctl_vbus_override(struct tegra_xusb_padctl *padctl,
313 dev_dbg(padctl->dev, "%s vbus override\n", status ? "set" : "clear");
315 value = padctl_readl(padctl, USB2_VBUS_ID);
325 padctl_writel(padctl, value, USB2_VBUS_ID);
330 static int tegra186_xusb_padctl_id_override(struct tegra_xusb_padctl *padctl,
335 dev_dbg(padctl->dev, "%s id override\n", status ? "set" : "clear");
337 value = padctl_readl(padctl, USB2_VBUS_ID);
342 padctl_writel(padctl, value, USB2_VBUS_ID);
345 value = padctl_readl(padctl, USB2_VBUS_ID);
355 padctl_writel(padctl, value, USB2_VBUS_ID);
364 struct tegra_xusb_padctl *padctl = lane->pad->padctl;
365 struct tegra_xusb_usb2_port *port = tegra_xusb_find_usb2_port(padctl,
369 mutex_lock(&padctl->lock);
375 tegra186_xusb_padctl_id_override(padctl, true);
379 tegra186_xusb_padctl_vbus_override(padctl, true);
389 tegra186_xusb_padctl_id_override(padctl, false);
390 tegra186_xusb_padctl_vbus_override(padctl, false);
394 mutex_unlock(&padctl->lock);
403 struct tegra_xusb_padctl *padctl = lane->pad->padctl;
404 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);
407 struct device *dev = padctl->dev;
410 port = tegra_xusb_find_usb2_port(padctl, index);
416 value = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX);
419 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PAD_MUX);
421 value = padctl_readl(padctl, XUSB_PADCTL_USB2_PORT_CAP);
433 padctl_writel(padctl, value, XUSB_PADCTL_USB2_PORT_CAP);
435 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));
456 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index));
458 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));
463 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index));
481 struct tegra_xusb_padctl *padctl = lane->pad->padctl;
484 struct device *dev = padctl->dev;
487 port = tegra_xusb_find_usb2_port(padctl, index);
508 struct tegra_xusb_padctl *padctl = lane->pad->padctl;
511 struct device *dev = padctl->dev;
514 port = tegra_xusb_find_usb2_port(padctl, index);
542 tegra186_usb2_pad_probe(struct tegra_xusb_padctl *padctl,
546 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl);
559 err = tegra_xusb_pad_init(pad, padctl, np);
614 return tegra_xusb_find_lane(port->padctl, "usb2", port->index);
675 return tegra_xusb_find_lane(port->padctl, "usb3", port->index);
689 struct tegra_xusb_padctl *padctl = lane->pad->padctl;
693 struct device *dev = padctl->dev;
696 port = tegra_xusb_find_usb3_port(padctl, index);
702 usb2 = tegra_xusb_find_usb2_port(padctl, port->port);
709 mutex_lock(&padctl->lock);
711 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CAP);
723 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CAP);
725 if (padctl->soc->supports_gen2 && port->disable_gen2) {
726 value = padctl_readl(padctl, XUSB_PADCTL_SS_PORT_CFG);
731 padctl_writel(padctl, value, XUSB_PADCTL_SS_PORT_CFG);
734 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);
736 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);
740 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);
742 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);
746 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);
748 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);
750 mutex_unlock(&padctl->lock);
758 struct tegra_xusb_padctl *padctl = lane->pad->padctl;
761 struct device *dev = padctl->dev;
764 port = tegra_xusb_find_usb3_port(padctl, index);
770 mutex_lock(&padctl->lock);
772 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);
774 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);
778 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);
780 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);
784 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM_1);
786 padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM_1);
788 mutex_unlock(&padctl->lock);
812 tegra186_usb3_pad_probe(struct tegra_xusb_padctl *padctl,
828 err = tegra_xusb_pad_init(pad, padctl, np);
865 tegra186_xusb_read_fuse_calibration(struct tegra186_xusb_padctl *padctl)
867 struct device *dev = padctl->base.dev;
872 count = padctl->base.soc->ports.usb2.count;
892 padctl->calib.hs_curr_level = level;
894 padctl->calib.hs_squelch = (value >> HS_SQUELCH_SHIFT) &
896 padctl->calib.hs_term_range_adj = (value >> HS_TERM_RANGE_ADJ_SHIFT) &
907 padctl->calib.rpd_ctrl = (value >> RPD_CTRL_SHIFT) & RPD_CTRL_MASK;
933 static void tegra186_xusb_padctl_remove(struct tegra_xusb_padctl *padctl)