Lines Matching refs:usbphyc
60 struct stm32_usbphyc *usbphyc;
113 static int stm32_usbphyc_pll_init(struct stm32_usbphyc *usbphyc)
116 u32 clk_rate = clk_get_rate(usbphyc->clk);
122 dev_err(usbphyc->dev, "input clk freq (%dHz) out of range\n",
136 writel_relaxed(usbphyc_pll, usbphyc->base + STM32_USBPHYC_PLL);
138 dev_dbg(usbphyc->dev, "input clk freq=%dHz, ndiv=%lu, frac=%lu\n",
145 static bool stm32_usbphyc_has_one_phy_active(struct stm32_usbphyc *usbphyc)
149 for (i = 0; i < usbphyc->nphys; i++)
150 if (usbphyc->phys[i]->active)
156 static int stm32_usbphyc_pll_enable(struct stm32_usbphyc *usbphyc)
158 void __iomem *pll_reg = usbphyc->base + STM32_USBPHYC_PLL;
163 if (pllen && stm32_usbphyc_has_one_phy_active(usbphyc))
172 ret = stm32_usbphyc_pll_init(usbphyc);
182 dev_err(usbphyc->dev, "PLLEN not set\n");
189 static int stm32_usbphyc_pll_disable(struct stm32_usbphyc *usbphyc)
191 void __iomem *pll_reg = usbphyc->base + STM32_USBPHYC_PLL;
194 if (stm32_usbphyc_has_one_phy_active(usbphyc))
202 dev_err(usbphyc->dev, "PLL not reset\n");
212 struct stm32_usbphyc *usbphyc = usbphyc_phy->usbphyc;
215 ret = stm32_usbphyc_pll_enable(usbphyc);
227 struct stm32_usbphyc *usbphyc = usbphyc_phy->usbphyc;
231 return stm32_usbphyc_pll_disable(usbphyc);
256 static void stm32_usbphyc_switch_setup(struct stm32_usbphyc *usbphyc,
260 stm32_usbphyc_clr_bits(usbphyc->base + STM32_USBPHYC_MISC,
263 stm32_usbphyc_set_bits(usbphyc->base + STM32_USBPHYC_MISC,
265 usbphyc->switch_setup = utmi_switch;
271 struct stm32_usbphyc *usbphyc = dev_get_drvdata(dev);
276 for (port = 0; port < usbphyc->nphys; port++) {
277 if (phynode == usbphyc->phys[port]->phy->dev.of_node) {
278 usbphyc_phy = usbphyc->phys[port];
296 if (usbphyc->switch_setup < 0) {
297 stm32_usbphyc_switch_setup(usbphyc, args->args[0]);
299 if (args->args[0] != usbphyc->switch_setup) {
311 struct stm32_usbphyc *usbphyc;
319 usbphyc = devm_kzalloc(dev, sizeof(*usbphyc), GFP_KERNEL);
320 if (!usbphyc)
322 usbphyc->dev = dev;
323 dev_set_drvdata(dev, usbphyc);
326 usbphyc->base = devm_ioremap_resource(dev, res);
327 if (IS_ERR(usbphyc->base))
328 return PTR_ERR(usbphyc->base);
330 usbphyc->clk = devm_clk_get(dev, NULL);
331 if (IS_ERR(usbphyc->clk)) {
332 ret = PTR_ERR(usbphyc->clk);
337 ret = clk_prepare_enable(usbphyc->clk);
343 usbphyc->rst = devm_reset_control_get(dev, NULL);
344 if (!IS_ERR(usbphyc->rst)) {
345 reset_control_assert(usbphyc->rst);
347 reset_control_deassert(usbphyc->rst);
350 usbphyc->switch_setup = -EINVAL;
351 usbphyc->nphys = of_get_child_count(np);
352 usbphyc->phys = devm_kcalloc(dev, usbphyc->nphys,
353 sizeof(*usbphyc->phys), GFP_KERNEL);
354 if (!usbphyc->phys) {
394 if (ret || index > usbphyc->nphys) {
401 usbphyc->phys[port] = usbphyc_phy;
405 usbphyc->phys[port]->phy = phy;
406 usbphyc->phys[port]->usbphyc = usbphyc;
407 usbphyc->phys[port]->index = index;
408 usbphyc->phys[port]->active = false;
421 version = readl_relaxed(usbphyc->base + STM32_USBPHYC_VERSION);
430 clk_disable_unprepare(usbphyc->clk);
437 struct stm32_usbphyc *usbphyc = dev_get_drvdata(&pdev->dev);
439 clk_disable_unprepare(usbphyc->clk);
445 { .compatible = "st,stm32mp1-usbphyc", },
455 .name = "stm32-usbphyc",