Lines Matching defs:ctrl0
200 u32 ctrl0;
244 ctrl0 = readl(drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);
246 ctrl0 &= ~EXYNOS_5250_HOSTPHYCTRL0_FSEL_MASK;
247 ctrl0 |= drv->ref_reg_val <<
251 ctrl0 &= ~(EXYNOS_5250_HOSTPHYCTRL0_PHYSWRST |
256 ctrl0 |= EXYNOS_5250_HOSTPHYCTRL0_LINKSWRST |
259 writel(ctrl0, drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);
261 ctrl0 &= ~(EXYNOS_5250_HOSTPHYCTRL0_LINKSWRST |
263 writel(ctrl0, drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);
326 u32 ctrl0;
341 ctrl0 = readl(drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);
342 ctrl0 |= (EXYNOS_5250_HOSTPHYCTRL0_SIDDQ |
347 writel(ctrl0, drv->reg_phy + EXYNOS_5250_HOSTPHYCTRL0);