Lines Matching defs:rk_phy
88 struct rockchip_pcie_phy *rk_phy = dev_get_drvdata(dev);
91 return rk_phy->phys[0].phy;
96 return rk_phy->phys[args->args[0]].phy;
100 static inline void phy_wr_cfg(struct rockchip_pcie_phy *rk_phy,
103 regmap_write(rk_phy->reg_base, rk_phy->phy_data->pcie_conf,
111 regmap_write(rk_phy->reg_base, rk_phy->phy_data->pcie_conf,
116 regmap_write(rk_phy->reg_base, rk_phy->phy_data->pcie_conf,
122 static inline u32 phy_rd_cfg(struct rockchip_pcie_phy *rk_phy,
127 regmap_write(rk_phy->reg_base, rk_phy->phy_data->pcie_conf,
131 regmap_read(rk_phy->reg_base,
132 rk_phy->phy_data->pcie_status,
140 struct rockchip_pcie_phy *rk_phy = to_pcie_phy(inst);
143 mutex_lock(&rk_phy->pcie_mutex);
145 regmap_write(rk_phy->reg_base,
146 rk_phy->phy_data->pcie_laneoff,
151 if (--rk_phy->pwr_cnt)
154 err = reset_control_assert(rk_phy->phy_rst);
161 mutex_unlock(&rk_phy->pcie_mutex);
165 rk_phy->pwr_cnt++;
166 regmap_write(rk_phy->reg_base,
167 rk_phy->phy_data->pcie_laneoff,
171 mutex_unlock(&rk_phy->pcie_mutex);
178 struct rockchip_pcie_phy *rk_phy = to_pcie_phy(inst);
183 mutex_lock(&rk_phy->pcie_mutex);
185 if (rk_phy->pwr_cnt++)
188 err = reset_control_deassert(rk_phy->phy_rst);
194 regmap_write(rk_phy->reg_base, rk_phy->phy_data->pcie_conf,
199 regmap_write(rk_phy->reg_base,
200 rk_phy->phy_data->pcie_laneoff,
214 regmap_read(rk_phy->reg_base,
215 rk_phy->phy_data->pcie_status,
230 phy_wr_cfg(rk_phy, PHY_CFG_CLK_TEST, PHY_CFG_SEPE_RATE);
231 phy_wr_cfg(rk_phy, PHY_CFG_CLK_SCC, PHY_CFG_PLL_100M);
235 regmap_read(rk_phy->reg_base,
236 rk_phy->phy_data->pcie_status,
251 regmap_write(rk_phy->reg_base, rk_phy->phy_data->pcie_conf,
257 regmap_read(rk_phy->reg_base,
258 rk_phy->phy_data->pcie_status,
274 mutex_unlock(&rk_phy->pcie_mutex);
278 reset_control_assert(rk_phy->phy_rst);
280 rk_phy->pwr_cnt--;
281 mutex_unlock(&rk_phy->pcie_mutex);
288 struct rockchip_pcie_phy *rk_phy = to_pcie_phy(inst);
291 mutex_lock(&rk_phy->pcie_mutex);
293 if (rk_phy->init_cnt++)
296 err = clk_prepare_enable(rk_phy->clk_pciephy_ref);
302 err = reset_control_assert(rk_phy->phy_rst);
309 mutex_unlock(&rk_phy->pcie_mutex);
314 clk_disable_unprepare(rk_phy->clk_pciephy_ref);
316 rk_phy->init_cnt--;
317 mutex_unlock(&rk_phy->pcie_mutex);
324 struct rockchip_pcie_phy *rk_phy = to_pcie_phy(inst);
326 mutex_lock(&rk_phy->pcie_mutex);
328 if (--rk_phy->init_cnt)
331 clk_disable_unprepare(rk_phy->clk_pciephy_ref);
334 mutex_unlock(&rk_phy->pcie_mutex);
365 struct rockchip_pcie_phy *rk_phy;
378 rk_phy = devm_kzalloc(dev, sizeof(*rk_phy), GFP_KERNEL);
379 if (!rk_phy)
386 rk_phy->phy_data = (struct rockchip_pcie_data *)of_id->data;
387 rk_phy->reg_base = grf;
389 mutex_init(&rk_phy->pcie_mutex);
391 rk_phy->phy_rst = devm_reset_control_get(dev, "phy");
392 if (IS_ERR(rk_phy->phy_rst)) {
393 if (PTR_ERR(rk_phy->phy_rst) != -EPROBE_DEFER)
396 return PTR_ERR(rk_phy->phy_rst);
399 rk_phy->clk_pciephy_ref = devm_clk_get(dev, "refclk");
400 if (IS_ERR(rk_phy->clk_pciephy_ref)) {
402 return PTR_ERR(rk_phy->clk_pciephy_ref);
413 rk_phy->phys[i].phy = devm_phy_create(dev, dev->of_node, &ops);
414 if (IS_ERR(rk_phy->phys[i].phy)) {
416 return PTR_ERR(rk_phy->phys[i].phy);
418 rk_phy->phys[i].index = i;
419 phy_set_drvdata(rk_phy->phys[i].phy, &rk_phy->phys[i]);
422 platform_set_drvdata(pdev, rk_phy);