Lines Matching defs:inno_update_bits
396 static inline void inno_update_bits(struct inno_hdmi_phy *inno, u8 reg,
450 inno_update_bits(inno, 0x02, RK3328_PDATA_EN, 0);
452 inno_update_bits(inno, 0x02, RK3328_PDATA_EN, RK3328_PDATA_EN);
553 inno_update_bits(inno, 0xe0, RK3228_PRE_PLL_POWER_DOWN, 0);
561 inno_update_bits(inno, 0xe0, RK3228_PRE_PLL_POWER_DOWN,
636 inno_update_bits(inno, 0xe0, RK3228_PRE_PLL_POWER_DOWN,
639 inno_update_bits(inno, 0xe2, RK3228_PRE_PLL_FB_DIV_8_MASK |
646 inno_update_bits(inno, 0xe4, RK3228_PRE_PLL_PCLK_DIV_B_MASK |
650 inno_update_bits(inno, 0xe5, RK3228_PRE_PLL_PCLK_DIV_C_MASK |
654 inno_update_bits(inno, 0xe6, RK3228_PRE_PLL_TMDSCLK_DIV_C_MASK |
662 inno_update_bits(inno, 0xe0, RK3228_PRE_PLL_POWER_DOWN, 0);
699 inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, 0);
707 inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN,
791 inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN,
795 inno_update_bits(inno, 0xa0, RK3328_PCLK_VCO_DIV_5_MASK,
815 inno_update_bits(inno, 0xa0, RK3328_PRE_PLL_POWER_DOWN, 0);
885 inno_update_bits(inno, 0x02, RK3228_BYPASS_PDATA_EN,
889 inno_update_bits(inno, 0xaa, RK3228_POST_PLL_CTRL_MANUAL,
905 inno_update_bits(inno, 0x02, RK3228_PDATAEN_DISABLE,
907 inno_update_bits(inno, 0xe0, RK3228_PRE_PLL_POWER_DOWN |
913 inno_update_bits(inno, 0xe9, RK3228_POST_PLL_PRE_DIV_MASK,
915 inno_update_bits(inno, 0xeb, RK3228_POST_PLL_FB_DIV_8_MASK,
920 inno_update_bits(inno, 0xe9, RK3228_POST_PLL_POST_DIV_ENABLE,
925 inno_update_bits(inno, 0xe9, RK3228_POST_PLL_POST_DIV_ENABLE,
927 inno_update_bits(inno, 0xeb, RK3228_POST_PLL_POST_DIV_MASK,
934 inno_update_bits(inno, 0xe0, RK3228_PRE_PLL_POWER_DOWN |
936 inno_update_bits(inno, 0xe1, RK3228_BANDGAP_ENABLE,
938 inno_update_bits(inno, 0xe1, RK3228_TMDS_DRIVER_ENABLE,
952 inno_update_bits(inno, 0x02, RK3228_PDATAEN_DISABLE, 0);
958 inno_update_bits(inno, 0xe1, RK3228_TMDS_DRIVER_ENABLE, 0);
959 inno_update_bits(inno, 0xe1, RK3228_BANDGAP_ENABLE, 0);
960 inno_update_bits(inno, 0xe0, RK3228_POST_PLL_POWER_DOWN,
1020 inno_update_bits(inno, 0x02, RK3328_PDATA_EN, 0);
1021 inno_update_bits(inno, 0xaa, RK3328_POST_PLL_POWER_DOWN,
1046 inno_update_bits(inno, 0xc8 + v, RK3328_ESD_DETECT_MASK,
1056 inno_update_bits(inno, 0xc5,
1063 inno_update_bits(inno, 0xc8,
1070 inno_update_bits(inno, 0xc9 + v,
1075 inno_update_bits(inno, 0xaa, RK3328_POST_PLL_POWER_DOWN, 0);
1076 inno_update_bits(inno, 0xb0, RK3328_BANDGAP_ENABLE,
1078 inno_update_bits(inno, 0xb2, RK3328_TMDS_DRIVER_ENABLE,
1092 inno_update_bits(inno, 0x02, RK3328_PDATA_EN, RK3328_PDATA_EN);
1104 inno_update_bits(inno, 0xb2, RK3328_TMDS_DRIVER_ENABLE, 0);
1105 inno_update_bits(inno, 0xb0, RK3328_BANDGAP_ENABLE, 0);
1106 inno_update_bits(inno, 0xaa, RK3328_POST_PLL_POWER_DOWN,