Lines Matching refs:serdes
1834 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
1902 * @serdes: iomapped memory space for phy's serdes (i.e. PLL)
1918 void __iomem *serdes;
2625 void __iomem *serdes = qphy->serdes;
2631 qcom_qmp_phy_configure(serdes, cfg->regs, serdes_tbl, serdes_tbl_num);
2636 qcom_qmp_phy_configure(serdes, cfg->regs,
2641 qcom_qmp_phy_configure(serdes, cfg->regs,
2646 qcom_qmp_phy_configure(serdes, cfg->regs,
2651 qcom_qmp_phy_configure(serdes, cfg->regs,
2666 qphy_clrbits(serdes, cfg->regs[QPHY_COM_SW_RESET], SW_RESET);
2667 qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL],
2670 status = serdes + cfg->regs[QPHY_COM_PCS_READY_STATUS];
2694 qphy->serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN);
2708 qphy->serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN);
2862 writel(0x20, qphy->serdes + QSERDES_V3_COM_RESETSM_CNTRL);
2864 if (readl_poll_timeout(qphy->serdes + QSERDES_V3_COM_C_READY_STATUS,
2914 void __iomem *serdes = qphy->serdes;
2980 qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
3011 void __iomem *serdes = qphy->serdes;
3022 qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL],
3024 qphy_clrbits(serdes, cfg->regs[QPHY_COM_SW_RESET],
3026 qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
3727 void __iomem *serdes, const struct qmp_phy_cfg *cfg)
3741 qphy->serdes = serdes;
3936 void __iomem *serdes;
3970 /* per PHY serdes; usually located at base address */
3971 usb_serdes = serdes = devm_platform_ioremap_resource(pdev, 0);
3972 if (IS_ERR(serdes))
3973 return PTR_ERR(serdes);
3983 /* Only two serdes for combo PHY */
4033 serdes = dp_serdes;
4036 serdes = usb_serdes;
4040 ret = qcom_qmp_phy_create(dev, child, id, serdes, cfg);