Lines Matching defs:regval
68 u32 regval;
74 regval = readl(ctrl_reg + PORT_VSR_DATA);
75 regval &= ~mask;
76 regval |= val;
77 writel(regval, ctrl_reg + PORT_VSR_DATA);
85 u32 regval;
93 regval = readl(priv->base + HOST_VSA_DATA);
94 regval &= ~desc->power_bit;
95 writel(regval, priv->base + HOST_VSA_DATA);
99 regval = readl(priv->base + HOST_VSA_DATA);
100 regval |= MBUS_WRITE_REQUEST_SIZE_128 | MBUS_READ_REQUEST_SIZE_128;
101 writel(regval, priv->base + HOST_VSA_DATA);
121 regval = readl(ctrl_reg + PORT_SCR_CTL);
122 regval &= ~GENMASK(7, 4);
123 regval |= 0x30;
124 writel(regval, ctrl_reg + PORT_SCR_CTL);
137 u32 regval;
145 regval = readl(priv->base + HOST_VSA_DATA);
146 regval |= desc->power_bit;
147 writel(regval, priv->base + HOST_VSA_DATA);