Lines Matching defs:dphy
18 #include <linux/phy/phy-mipi-dphy.h>
99 struct sun6i_dphy *dphy = phy_get_drvdata(phy);
101 reset_control_deassert(dphy->reset);
102 clk_prepare_enable(dphy->mod_clk);
103 clk_set_rate_exclusive(dphy->mod_clk, 150000000);
110 struct sun6i_dphy *dphy = phy_get_drvdata(phy);
117 memcpy(&dphy->config, opts, sizeof(dphy->config));
124 struct sun6i_dphy *dphy = phy_get_drvdata(phy);
125 u8 lanes_mask = GENMASK(dphy->config.lanes - 1, 0);
127 regmap_write(dphy->regs, SUN6I_DPHY_TX_CTL_REG,
130 regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME0_REG,
135 regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME1_REG,
141 regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME2_REG,
144 regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME3_REG, 0);
146 regmap_write(dphy->regs, SUN6I_DPHY_TX_TIME4_REG,
150 regmap_write(dphy->regs, SUN6I_DPHY_GCTL_REG,
151 SUN6I_DPHY_GCTL_LANE_NUM(dphy->config.lanes) |
154 regmap_write(dphy->regs, SUN6I_DPHY_ANA0_REG,
161 regmap_write(dphy->regs, SUN6I_DPHY_ANA1_REG,
165 regmap_write(dphy->regs, SUN6I_DPHY_ANA4_REG,
176 regmap_write(dphy->regs, SUN6I_DPHY_ANA2_REG,
180 regmap_write(dphy->regs, SUN6I_DPHY_ANA3_REG,
186 regmap_update_bits(dphy->regs, SUN6I_DPHY_ANA3_REG,
193 regmap_update_bits(dphy->regs, SUN6I_DPHY_ANA3_REG,
198 regmap_update_bits(dphy->regs, SUN6I_DPHY_ANA2_REG,
203 regmap_update_bits(dphy->regs, SUN6I_DPHY_ANA1_REG,
207 regmap_update_bits(dphy->regs, SUN6I_DPHY_ANA2_REG,
216 struct sun6i_dphy *dphy = phy_get_drvdata(phy);
218 regmap_update_bits(dphy->regs, SUN6I_DPHY_ANA1_REG,
226 struct sun6i_dphy *dphy = phy_get_drvdata(phy);
228 clk_rate_exclusive_put(dphy->mod_clk);
229 clk_disable_unprepare(dphy->mod_clk);
230 reset_control_assert(dphy->reset);
249 .name = "mipi-dphy",
255 struct sun6i_dphy *dphy;
259 dphy = devm_kzalloc(&pdev->dev, sizeof(*dphy), GFP_KERNEL);
260 if (!dphy)
270 dphy->regs = devm_regmap_init_mmio_clk(&pdev->dev, "bus",
272 if (IS_ERR(dphy->regs)) {
274 return PTR_ERR(dphy->regs);
277 dphy->reset = devm_reset_control_get_shared(&pdev->dev, NULL);
278 if (IS_ERR(dphy->reset)) {
280 return PTR_ERR(dphy->reset);
283 dphy->mod_clk = devm_clk_get(&pdev->dev, "mod");
284 if (IS_ERR(dphy->mod_clk)) {
286 return PTR_ERR(dphy->mod_clk);
289 dphy->phy = devm_phy_create(&pdev->dev, NULL, &sun6i_dphy_ops);
290 if (IS_ERR(dphy->phy)) {
292 return PTR_ERR(dphy->phy);
295 phy_set_drvdata(dphy->phy, dphy);
302 { .compatible = "allwinner,sun6i-a31-mipi-dphy" },
310 .name = "sun6i-mipi-dphy",