Lines Matching refs:val
107 void (*write_counter)(struct xgene_pmu_dev *pmu, int idx, u64 val);
108 void (*write_evttype)(struct xgene_pmu_dev *pmu_dev, int idx, u32 val);
109 void (*write_agentmsk)(struct xgene_pmu_dev *pmu_dev, u32 val);
110 void (*write_agent1msk)(struct xgene_pmu_dev *pmu_dev, u32 val);
760 xgene_pmu_write_counter32(struct xgene_pmu_dev *pmu_dev, int idx, u64 val)
762 writel(val, pmu_dev->inf->csr + PMU_PMEVCNTR0 + (4 * idx));
766 xgene_pmu_write_counter64(struct xgene_pmu_dev *pmu_dev, int idx, u64 val)
770 cnt_hi = upper_32_bits(val);
771 cnt_lo = lower_32_bits(val);
779 xgene_pmu_write_evttype(struct xgene_pmu_dev *pmu_dev, int idx, u32 val)
781 writel(val, pmu_dev->inf->csr + PMU_PMEVTYPER0 + (4 * idx));
785 xgene_pmu_write_agentmsk(struct xgene_pmu_dev *pmu_dev, u32 val)
787 writel(val, pmu_dev->inf->csr + PMU_PMAMR0);
791 xgene_pmu_v3_write_agentmsk(struct xgene_pmu_dev *pmu_dev, u32 val) { }
794 xgene_pmu_write_agent1msk(struct xgene_pmu_dev *pmu_dev, u32 val)
796 writel(val, pmu_dev->inf->csr + PMU_PMAMR1);
800 xgene_pmu_v3_write_agent1msk(struct xgene_pmu_dev *pmu_dev, u32 val) { }
805 u32 val;
807 val = readl(pmu_dev->inf->csr + PMU_PMCNTENSET);
808 val |= 1 << idx;
809 writel(val, pmu_dev->inf->csr + PMU_PMCNTENSET);
815 u32 val;
817 val = readl(pmu_dev->inf->csr + PMU_PMCNTENCLR);
818 val |= 1 << idx;
819 writel(val, pmu_dev->inf->csr + PMU_PMCNTENCLR);
825 u32 val;
827 val = readl(pmu_dev->inf->csr + PMU_PMINTENSET);
828 val |= 1 << idx;
829 writel(val, pmu_dev->inf->csr + PMU_PMINTENSET);
835 u32 val;
837 val = readl(pmu_dev->inf->csr + PMU_PMINTENCLR);
838 val |= 1 << idx;
839 writel(val, pmu_dev->inf->csr + PMU_PMINTENCLR);
844 u32 val;
846 val = readl(pmu_dev->inf->csr + PMU_PMCR);
847 val |= PMU_PMCR_P;
848 writel(val, pmu_dev->inf->csr + PMU_PMCR);
853 u32 val;
855 val = readl(pmu_dev->inf->csr + PMU_PMCR);
856 val |= PMU_PMCR_E;
857 writel(val, pmu_dev->inf->csr + PMU_PMCR);
862 u32 val;
864 val = readl(pmu_dev->inf->csr + PMU_PMCR);
865 val &= ~PMU_PMCR_E;
866 writel(val, pmu_dev->inf->csr + PMU_PMCR);
984 u64 val = 1ULL << 31;
986 local64_set(&hw->prev_count, val);
987 xgene_pmu->ops->write_counter(pmu_dev, hw->idx, val);
1238 u32 val;
1243 val = readl(xgene_pmu->pcppmu_csr + PCPPMU_INTSTATUS_REG);
1255 if (val & intr_mcu) {
1260 if (val & intr_mcb) {
1265 if (val & intr_l3c) {
1270 if (val & intr_iob) {