Lines Matching refs:inf
93 struct hw_pmu_info *inf;
142 struct hw_pmu_info inf;
737 return readl(pmu_dev->inf->csr + PMU_PMEVCNTR0 + (4 * idx));
762 writel(val, pmu_dev->inf->csr + PMU_PMEVCNTR0 + (4 * idx));
781 writel(val, pmu_dev->inf->csr + PMU_PMEVTYPER0 + (4 * idx));
787 writel(val, pmu_dev->inf->csr + PMU_PMAMR0);
796 writel(val, pmu_dev->inf->csr + PMU_PMAMR1);
807 val = readl(pmu_dev->inf->csr + PMU_PMCNTENSET);
809 writel(val, pmu_dev->inf->csr + PMU_PMCNTENSET);
817 val = readl(pmu_dev->inf->csr + PMU_PMCNTENCLR);
819 writel(val, pmu_dev->inf->csr + PMU_PMCNTENCLR);
827 val = readl(pmu_dev->inf->csr + PMU_PMINTENSET);
829 writel(val, pmu_dev->inf->csr + PMU_PMINTENSET);
837 val = readl(pmu_dev->inf->csr + PMU_PMINTENCLR);
839 writel(val, pmu_dev->inf->csr + PMU_PMINTENCLR);
846 val = readl(pmu_dev->inf->csr + PMU_PMCR);
848 writel(val, pmu_dev->inf->csr + PMU_PMCR);
855 val = readl(pmu_dev->inf->csr + PMU_PMCR);
857 writel(val, pmu_dev->inf->csr + PMU_PMCR);
864 val = readl(pmu_dev->inf->csr + PMU_PMCR);
866 writel(val, pmu_dev->inf->csr + PMU_PMCR);
955 if (pmu_dev->inf->type == PMU_TYPE_IOB)
1140 pmu->inf = &ctx->inf;
1143 switch (pmu->inf->type) {
1145 if (!(xgene_pmu->l3c_active_mask & pmu->inf->enable_mask))
1163 if (!(xgene_pmu->mcb_active_mask & pmu->inf->enable_mask))
1171 if (!(xgene_pmu->mc_active_mask & pmu->inf->enable_mask))
1195 void __iomem *csr = pmu_dev->inf->csr;
1464 struct hw_pmu_info *inf;
1515 inf = &ctx->inf;
1516 inf->type = type;
1517 inf->csr = dev_csr;
1518 inf->enable_mask = 1 << enable_bit;
1580 switch (ctx->inf.type) {
1634 struct hw_pmu_info *inf;
1664 inf = &ctx->inf;
1665 inf->type = type;
1666 inf->csr = dev_csr;
1667 inf->enable_mask = 1 << enable_bit;
1702 switch (ctx->inf.type) {