Lines Matching refs:reg
62 unsigned short reg)
69 reg += socket->number * 0x40;
71 outb(reg, port);
79 unsigned short reg)
86 reg = reg + socket->number * 0x40;
88 outb(reg, port);
90 reg++;
91 outb(reg, port);
98 static void indirect_write(struct pd6729_socket *socket, unsigned short reg,
105 reg = reg + socket->number * 0x40;
107 outb(reg, port);
112 static void indirect_setbit(struct pd6729_socket *socket, unsigned short reg,
120 reg = reg + socket->number * 0x40;
122 outb(reg, port);
125 outb(reg, port);
130 static void indirect_resetbit(struct pd6729_socket *socket, unsigned short reg,
138 reg = reg + socket->number * 0x40;
140 outb(reg, port);
143 outb(reg, port);
148 static void indirect_write16(struct pd6729_socket *socket, unsigned short reg,
156 reg = reg + socket->number * 0x40;
159 outb(reg, port);
163 reg++;
165 outb(reg, port);
298 unsigned char reg, data;
307 reg = 0;
310 reg |= I365_PC_RESET;
312 reg |= I365_PC_IOCARD;
315 indirect_write(socket, I365_INTCTL, reg);
319 reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
323 reg |= I365_PWR_AUTO; /* automatic power mngmnt */
327 reg |= I365_PWR_OUT; /* enable power */
337 reg |= I365_VCC_5V;
344 reg |= I365_VCC_5V;
363 reg |= I365_VPP1_5V;
367 reg |= I365_VPP1_12V;
376 if (reg != indirect_read(socket, I365_POWER))
377 indirect_write(socket, I365_POWER, reg);
390 reg = 0x00;
392 reg |= I365_CSC_DETECT;
396 reg |= I365_CSC_STSCHG;
399 reg |= I365_CSC_BVD1;
401 reg |= I365_CSC_BVD2;
403 reg |= I365_CSC_READY;
406 reg |= 0x30; /* management IRQ: PCI INTA# = "irq 3" */
407 indirect_write(socket, I365_CSCINT, reg);
409 reg = indirect_read(socket, I365_INTCTL);
411 reg |= 0x03; /* card IRQ: PCI INTA# = "irq 3" */
413 reg |= socket->card_irq;
414 indirect_write(socket, I365_INTCTL, reg);