Lines Matching refs:buses
1196 * pci_scan_bridge_extend() - Scan buses behind a bridge
1199 * @max: Starting subordinate number of buses behind this bridge
1200 * @available_buses: Total number of buses available for this bridge and
1202 * been allocated the remaining buses will be
1213 * them, we proceed to assigning numbers to the remaining buses in
1216 * Return: New subordinate number covering all buses behind this bridge.
1224 u32 buses, i, j = 0;
1238 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
1239 primary = buses & 0xFF;
1240 secondary = (buses >> 8) & 0xFF;
1241 subordinate = (buses >> 16) & 0xFF;
1323 buses & ~0xffffff);
1354 buses = (buses & 0xff000000)
1364 buses &= ~0xff000000;
1365 buses |= CARDBUS_LATENCY_TIMER << 24;
1369 pci_write_config_dword(dev, PCI_PRIMARY_BUS, buses);
1445 * pci_scan_bridge() - Scan buses behind a bridge
1448 * @max: Starting subordinate number of buses behind this bridge
1458 * them, we proceed to assigning numbers to the remaining buses in
1461 * Return: New subordinate number covering all buses behind this bridge.
2806 * @available_buses: Total number of buses available (%0 does not try to
2809 * Scans devices below @bus including subordinate buses. Returns new
2844 /* Reserve buses for SR-IOV capability */
2861 * buses between hotplug bridges.
2890 unsigned int buses = 0;
2896 * port) so it gets all available buses which it
2900 buses = available_buses;
2904 * Distribute the extra buses between hotplug
2907 buses = available_buses / hotplug_bridges;
2908 buses = min(buses, available_buses - used_buses + 1);
2912 max = pci_scan_bridge_extend(bus, dev, cmax, buses, 1);
2920 * number of buses but allow it to grow up to the maximum available
2929 /* Do not allocate more buses than we have room left */
2943 * Return how far we've got finding sub-buses.
2953 * Scans devices below @bus including subordinate buses. Returns new
3202 * Scan a PCI bus and child buses for new devices, add them,
3227 * Scan a PCI bus and child buses for new devices, add them,