Lines Matching refs:root
52 struct pcie_link_state *root; /* pointer to the root port link */
420 * Every switch on the path to root complex need 1
873 * the root ports entirely, in which case a downstream port on
874 * a switch may become the root of the link state chain for all
880 link->root = link;
891 link->root = link->parent->root;
910 * @pdev: the root port or switch downstream port
931 /* VIA has a strange chipset, root port is under a bridge */
976 /* Recheck latencies and update aspm_capable for links under the root */
977 static void pcie_update_aspm_capable(struct pcie_link_state *root)
980 BUG_ON(root->parent);
982 if (link->root != root)
989 if (link->root != root)
1004 struct pcie_link_state *link, *root, *parent_link;
1013 root = link->root;
1033 pcie_update_aspm_capable(root);
1041 /* @pdev: the root port or switch downstream port */
1054 pcie_update_aspm_capable(link->root);