Lines Matching refs:aer

144 	int aer = dev->aer_cap;
147 	if (!aer)
150 	pci_read_config_dword(dev, aer + PCI_ERR_CAP, &reg32);
155 	pci_write_config_dword(dev, aer + PCI_ERR_CAP, reg32);
168 	int aer = dev->aer_cap;
171 	if (!aer)
174 	pci_read_config_dword(dev, aer + PCI_ERR_CAP, &reg32);
176 	pci_write_config_dword(dev, aer + PCI_ERR_CAP, reg32);
256 	int aer = dev->aer_cap;
263 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status);
264 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_SEVER, &sev);
267 		pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status);
275 	int aer = dev->aer_cap;
282 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status);
283 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_SEVER, &sev);
286 		pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status);
300 	int aer = dev->aer_cap;
304 	if (!aer)
310 		pci_read_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, &status);
311 		pci_write_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, status);
314 	pci_read_config_dword(dev, aer + PCI_ERR_COR_STATUS, &status);
315 	pci_write_config_dword(dev, aer + PCI_ERR_COR_STATUS, status);
317 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status);
318 	pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, status);
333 	int aer = dev->aer_cap;
337 	if (!aer)
345 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, cap++);
346 	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_SEVER, cap++);
347 	pci_read_config_dword(dev, aer + PCI_ERR_COR_MASK, cap++);
348 	pci_read_config_dword(dev, aer + PCI_ERR_CAP, cap++);
350 		pci_read_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, cap++);
355 	int aer = dev->aer_cap;
359 	if (!aer)
367 	pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, *cap++);
368 	pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_SEVER, *cap++);
369 	pci_write_config_dword(dev, aer + PCI_ERR_COR_MASK, *cap++);
370 	pci_write_config_dword(dev, aer + PCI_ERR_CAP, *cap++);
372 		pci_write_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, *cap++);
766 		    struct aer_capability_regs *aer)
773 		status = aer->cor_status;
774 		mask = aer->cor_mask;
776 		status = aer->uncor_status;
777 		mask = aer->uncor_mask;
788 	info.first_error = PCI_ERR_CAP_FEP(aer->cap_control);
797 			aer->uncor_severity);
800 		__print_tlp_header(dev, &aer->header_log);
803 			aer_severity, tlp_header_valid, &aer->header_log);
829 	int aer = dev->aer_cap;
864 	if (!aer)
869 		pci_read_config_dword(dev, aer + PCI_ERR_COR_STATUS, &status);
870 		pci_read_config_dword(dev, aer + PCI_ERR_COR_MASK, &mask);
872 		pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS, &status);
873 		pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, &mask);
949 	int aer = dev->aer_cap;
956 		if (aer)
957 			pci_write_config_dword(dev, aer + PCI_ERR_COR_STATUS,
1050 	int aer = dev->aer_cap;
1058 	if (!aer)
1062 		pci_read_config_dword(dev, aer + PCI_ERR_COR_STATUS,
1064 		pci_read_config_dword(dev, aer + PCI_ERR_COR_MASK,
1073 		pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_STATUS,
1075 		pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_MASK,
1081 		pci_read_config_dword(dev, aer + PCI_ERR_CAP, &temp);
1087 				aer + PCI_ERR_HEADER_LOG, &info->tlp.dw0);
1089 				aer + PCI_ERR_HEADER_LOG + 4, &info->tlp.dw1);
1091 				aer + PCI_ERR_HEADER_LOG + 8, &info->tlp.dw2);
1093 				aer + PCI_ERR_HEADER_LOG + 12, &info->tlp.dw3);
1199 	int aer = rp->aer_cap;
1202 	pci_read_config_dword(rp, aer + PCI_ERR_ROOT_STATUS, &e_src.status);
1206 	pci_read_config_dword(rp, aer + PCI_ERR_ROOT_ERR_SRC, &e_src.id);
1207 	pci_write_config_dword(rp, aer + PCI_ERR_ROOT_STATUS, e_src.status);
1260 	int aer = pdev->aer_cap;
1273 	pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_STATUS, &reg32);
1274 	pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_STATUS, reg32);
1275 	pci_read_config_dword(pdev, aer + PCI_ERR_COR_STATUS, &reg32);
1276 	pci_write_config_dword(pdev, aer + PCI_ERR_COR_STATUS, reg32);
1277 	pci_read_config_dword(pdev, aer + PCI_ERR_UNCOR_STATUS, &reg32);
1278 	pci_write_config_dword(pdev, aer + PCI_ERR_UNCOR_STATUS, reg32);
1287 	pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, &reg32);
1289 	pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, reg32);
1301 	int aer = pdev->aer_cap;
1311 	pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, &reg32);
1313 	pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, reg32);
1316 	pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_STATUS, &reg32);
1317 	pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_STATUS, reg32);
1386 	int aer;
1392 	aer = root->aer_cap;
1394 	if ((host->native_aer || pcie_ports_native) && aer) {
1396 		pci_read_config_dword(root, aer + PCI_ERR_ROOT_COMMAND, &reg32);
1398 		pci_write_config_dword(root, aer + PCI_ERR_ROOT_COMMAND, reg32);
1414 	if ((host->native_aer || pcie_ports_native) && aer) {
1416 		pci_read_config_dword(root, aer + PCI_ERR_ROOT_STATUS, &reg32);
1417 		pci_write_config_dword(root, aer + PCI_ERR_ROOT_STATUS, reg32);
1420 		pci_read_config_dword(root, aer + PCI_ERR_ROOT_COMMAND, &reg32);
1422 		pci_write_config_dword(root, aer + PCI_ERR_ROOT_COMMAND, reg32);
1429 	.name		= "aer",