Lines Matching defs:reg
363 int reg = where & ~3;
365 int reg, u32 *value);
369 if (bridge->has_pcie && reg >= PCI_CAP_PCIE_END) {
374 if (!bridge->has_pcie && reg >= PCI_BRIDGE_CONF_END) {
379 if (bridge->has_pcie && reg >= PCI_CAP_PCIE_START) {
380 reg -= PCI_CAP_PCIE_START;
391 ret = read_op(bridge, reg, value);
396 *value = le32_to_cpu(cfgspace[reg / 4]);
402 *value &= behavior[reg / 4].ro | behavior[reg / 4].rw |
403 behavior[reg / 4].w1c;
424 int reg = where & ~3;
426 void (*write_op)(struct pci_bridge_emul *bridge, int reg,
431 if (bridge->has_pcie && reg >= PCI_CAP_PCIE_END)
434 if (!bridge->has_pcie && reg >= PCI_BRIDGE_CONF_END)
448 ret = pci_bridge_emul_conf_read(bridge, reg, 4, &old);
452 if (bridge->has_pcie && reg >= PCI_CAP_PCIE_START) {
453 reg -= PCI_CAP_PCIE_START;
464 new = old & (~mask | ~behavior[reg / 4].rw);
467 new |= (value << shift) & (behavior[reg / 4].rw & mask);
470 new &= ~((value << shift) & (behavior[reg / 4].w1c & mask));
473 cfgspace[reg / 4] = cpu_to_le32(new);
479 new &= ~(behavior[reg / 4].w1c & ~mask);
485 new |= (value << shift) & (behavior[reg / 4].w1c & mask);
488 write_op(bridge, reg, old, new, mask);