Lines Matching defs:temp_byte
131 u8 temp_byte;
169 temp_byte = (temp_word >> hp_slot) & 0x01;
170 temp_byte |= (temp_word >> (hp_slot + 7)) & 0x02;
172 if (temp_byte != func->presence_save) {
1258 u8 temp_byte;
1287 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1289 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1408 u8 temp_byte;
1435 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1437 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
1616 u8 temp_byte;
1665 temp_byte = readb(ctrl->hpc_reg + SLOT_SERR);
1666 temp_byte &= ~(0x01 << hp_slot);
1667 writeb(temp_byte, ctrl->hpc_reg + SLOT_SERR);
2225 u8 temp_byte, function, max_functions, stop_it;
2236 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte);
2242 if (temp_byte & 0x80) /* Multi-function device */
2324 u8 temp_byte;
2353 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte);
2357 if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
2373 temp_byte = bus_node->base;
2375 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte);
2380 temp_byte = bus_node->base + bus_node->length - 1;
2382 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2387 temp_byte = 0x40;
2388 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
2391 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
2396 temp_byte = 0x08;
2397 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
2476 temp_byte = io_node->base >> 8;
2477 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2479 temp_byte = (io_node->base + io_node->length - 1) >> 8;
2480 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2569 temp_byte = temp_resources.bus_head->base - 1;
2572 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte);
2592 temp_byte = (hold_IO_node->base) >> 8;
2593 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_IO_BASE, temp_byte);
2611 temp_byte = (io_node->base - 1) >> 8;
2612 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte);
2754 } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
2847 PCI_INTERRUPT_PIN, &temp_byte);
2852 if (temp_byte && resources->irqs &&
2854 (0x01 << ((temp_byte + resources->irqs->barber_pole - 1) & 0x03)))) {
2856 IRQ = resources->irqs->interrupt[(temp_byte +
2873 rc = cpqhp_set_irq(func->bus, func->device, temp_byte, IRQ);
2879 resources->irqs->interrupt[(temp_byte + resources->irqs->barber_pole - 1) & 0x03] = IRQ;
2880 resources->irqs->valid_INT |= 0x01 << (temp_byte + resources->irqs->barber_pole - 1) & 0x03;
2884 temp_byte = 0x40;
2886 PCI_LATENCY_TIMER, temp_byte);
2889 temp_byte = 0x08;
2891 PCI_CACHE_LINE_SIZE, temp_byte);