Lines Matching refs:nwl_bridge_readl
176 static inline u32 nwl_bridge_readl(struct nwl_pcie *pcie, u32 off)
270 misc_stat = nwl_bridge_readl(pcie, MSGF_MISC_STATUS) &
331 while ((status = nwl_bridge_readl(pcie, MSGF_LEG_STATUS) &
352 while ((status = nwl_bridge_readl(pcie, status_reg)) != 0) {
393 val = nwl_bridge_readl(pcie, MSGF_LEG_MASK);
409 val = nwl_bridge_readl(pcie, MSGF_LEG_MASK);
606 ret = nwl_bridge_readl(pcie, I_MSII_CAPABILITIES) & MSII_PRESENT;
614 nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, I_MSII_CONTROL) |
618 nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, I_MSII_CONTROL) |
632 nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, MSGF_MSI_STATUS_HI) &
643 nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, MSGF_MSI_STATUS_LO) &
662 breg_val = nwl_bridge_readl(pcie, E_BREG_CAPABILITIES) & BREG_PRESENT;
679 nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, BRCFG_PCIE_RX0) |
693 ecam_val = nwl_bridge_readl(pcie, E_ECAM_CAPABILITIES) & E_ECAM_PRESENT;
700 nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, E_ECAM_CONTROL) |
703 nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, E_ECAM_CONTROL) |
713 ecam_val = nwl_bridge_readl(pcie, E_ECAM_CONTROL);
744 nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, MSGF_MISC_STATUS) &
755 nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, MSGF_LEG_STATUS) &
762 nwl_bridge_writel(pcie, nwl_bridge_readl(pcie, BRCFG_INTERRUPT) |