Lines Matching refs:rockchip_pcie_write
56 rockchip_pcie_write(rockchip, 0,
58 rockchip_pcie_write(rockchip, 0,
60 rockchip_pcie_write(rockchip, 0,
62 rockchip_pcie_write(rockchip, 0,
64 rockchip_pcie_write(rockchip, 0,
66 rockchip_pcie_write(rockchip, 0,
92 rockchip_pcie_write(rockchip, 0,
94 rockchip_pcie_write(rockchip, 0,
96 rockchip_pcie_write(rockchip, desc0,
98 rockchip_pcie_write(rockchip, desc1,
102 rockchip_pcie_write(rockchip, addr0,
104 rockchip_pcie_write(rockchip, addr1,
106 rockchip_pcie_write(rockchip, desc0,
108 rockchip_pcie_write(rockchip, desc1,
119 rockchip_pcie_write(rockchip, addr0,
121 rockchip_pcie_write(rockchip, addr1,
137 rockchip_pcie_write(rockchip, vid_regs,
143 rockchip_pcie_write(rockchip, reg, PCIE_EP_CONFIG_DID_VID);
145 rockchip_pcie_write(rockchip,
151 rockchip_pcie_write(rockchip, hdr->cache_line_size,
154 rockchip_pcie_write(rockchip, hdr->subsys_id << 16,
157 rockchip_pcie_write(rockchip, hdr->interrupt_pin << 8,
223 rockchip_pcie_write(rockchip, cfg, reg);
224 rockchip_pcie_write(rockchip, addr0,
226 rockchip_pcie_write(rockchip, addr1,
254 rockchip_pcie_write(rockchip, cfg, reg);
255 rockchip_pcie_write(rockchip, 0x0,
257 rockchip_pcie_write(rockchip, 0x0,
327 rockchip_pcie_write(rockchip, flags,
358 rockchip_pcie_write(rockchip,
364 rockchip_pcie_write(rockchip,
479 rockchip_pcie_write(rockchip, cfg, PCIE_CORE_PHY_FUNC_CFG);
582 rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,
595 rockchip_pcie_write(rockchip, BIT(0), PCIE_CORE_PHY_FUNC_CFG);
614 rockchip_pcie_write(rockchip, PCIE_CLIENT_CONF_ENABLE,