Lines Matching refs:rockchip
20 #include "pcie-rockchip.h"
24 * @rockchip: Rockchip PCIe controller
41 struct rockchip_pcie rockchip;
53 static void rockchip_pcie_clear_ep_ob_atu(struct rockchip_pcie *rockchip,
56 rockchip_pcie_write(rockchip, 0,
58 rockchip_pcie_write(rockchip, 0,
60 rockchip_pcie_write(rockchip, 0,
62 rockchip_pcie_write(rockchip, 0,
64 rockchip_pcie_write(rockchip, 0,
66 rockchip_pcie_write(rockchip, 0,
70 static void rockchip_pcie_prog_ep_ob_atu(struct rockchip_pcie *rockchip, u8 fn,
83 cpu_addr -= rockchip->mem_res->start;
92 rockchip_pcie_write(rockchip, 0,
94 rockchip_pcie_write(rockchip, 0,
96 rockchip_pcie_write(rockchip, desc0,
98 rockchip_pcie_write(rockchip, desc1,
102 rockchip_pcie_write(rockchip, addr0,
104 rockchip_pcie_write(rockchip, addr1,
106 rockchip_pcie_write(rockchip, desc0,
108 rockchip_pcie_write(rockchip, desc1,
119 rockchip_pcie_write(rockchip, addr0,
121 rockchip_pcie_write(rockchip, addr1,
130 struct rockchip_pcie *rockchip = &ep->rockchip;
137 rockchip_pcie_write(rockchip, vid_regs,
141 reg = rockchip_pcie_read(rockchip, PCIE_EP_CONFIG_DID_VID);
143 rockchip_pcie_write(rockchip, reg, PCIE_EP_CONFIG_DID_VID);
145 rockchip_pcie_write(rockchip,
151 rockchip_pcie_write(rockchip, hdr->cache_line_size,
154 rockchip_pcie_write(rockchip, hdr->subsys_id << 16,
157 rockchip_pcie_write(rockchip, hdr->interrupt_pin << 8,
168 struct rockchip_pcie *rockchip = &ep->rockchip;
217 cfg = rockchip_pcie_read(rockchip, reg);
223 rockchip_pcie_write(rockchip, cfg, reg);
224 rockchip_pcie_write(rockchip, addr0,
226 rockchip_pcie_write(rockchip, addr1,
236 struct rockchip_pcie *rockchip = &ep->rockchip;
249 cfg = rockchip_pcie_read(rockchip, reg);
254 rockchip_pcie_write(rockchip, cfg, reg);
255 rockchip_pcie_write(rockchip, 0x0,
257 rockchip_pcie_write(rockchip, 0x0,
266 struct rockchip_pcie *pcie = &ep->rockchip;
292 struct rockchip_pcie *rockchip = &ep->rockchip;
306 rockchip_pcie_clear_ep_ob_atu(rockchip, r);
316 struct rockchip_pcie *rockchip = &ep->rockchip;
319 flags = rockchip_pcie_read(rockchip,
327 rockchip_pcie_write(rockchip, flags,
336 struct rockchip_pcie *rockchip = &ep->rockchip;
339 flags = rockchip_pcie_read(rockchip,
352 struct rockchip_pcie *rockchip = &ep->rockchip;
358 rockchip_pcie_write(rockchip,
364 rockchip_pcie_write(rockchip,
376 cmd = rockchip_pcie_read(&ep->rockchip,
397 struct rockchip_pcie *rockchip = &ep->rockchip;
403 flags = rockchip_pcie_read(&ep->rockchip,
418 data = rockchip_pcie_read(rockchip,
425 pci_addr = rockchip_pcie_read(rockchip,
430 pci_addr |= rockchip_pcie_read(rockchip,
439 rockchip_pcie_prog_ep_ob_atu(rockchip, fn, ep->max_regions - 1,
471 struct rockchip_pcie *rockchip = &ep->rockchip;
479 rockchip_pcie_write(rockchip, cfg, PCIE_CORE_PHY_FUNC_CFG);
510 static int rockchip_pcie_parse_ep_dt(struct rockchip_pcie *rockchip,
513 struct device *dev = rockchip->dev;
516 err = rockchip_pcie_parse_dt(rockchip);
520 err = rockchip_pcie_get_phys(rockchip);
525 "rockchip,max-outbound-regions",
539 { .compatible = "rockchip,rk3399-pcie-ep"},
547 struct rockchip_pcie *rockchip;
556 rockchip = &ep->rockchip;
557 rockchip->is_rc = false;
558 rockchip->dev = dev;
569 err = rockchip_pcie_parse_ep_dt(rockchip, ep);
573 err = rockchip_pcie_enable_clocks(rockchip);
577 err = rockchip_pcie_init_port(rockchip);
582 rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,
595 rockchip_pcie_write(rockchip, BIT(0), PCIE_CORE_PHY_FUNC_CFG);
597 err = pci_epc_mem_init(epc, rockchip->mem_res->start,
598 resource_size(rockchip->mem_res), PAGE_SIZE);
614 rockchip_pcie_write(rockchip, PCIE_CLIENT_CONF_ENABLE,
621 rockchip_pcie_deinit_phys(rockchip);
623 rockchip_pcie_disable_clocks(rockchip);
629 .name = "rockchip-pcie-ep",