Lines Matching refs:v3
315 struct v3_pci *v3 = bus->sysdata;
367 writel(v3_addr_to_lb_base(v3->non_pre_mem) |
369 v3->base + V3_LB_BASE0);
375 writel(v3_addr_to_lb_base(v3->config_mem) |
377 v3->base + V3_LB_BASE1);
378 writew(mapaddress, v3->base + V3_LB_MAP1);
380 return v3->config_base + address + offset;
383 static void v3_unmap_bus(struct v3_pci *v3)
388 writel(v3_addr_to_lb_base(v3->pre_mem) |
391 v3->base + V3_LB_BASE1);
392 writew(v3_addr_to_lb_map(v3->pre_bus_addr) |
394 v3->base + V3_LB_MAP1);
399 writel(v3_addr_to_lb_base(v3->non_pre_mem) |
401 v3->base + V3_LB_BASE0);
407 struct v3_pci *v3 = bus->sysdata;
414 v3_unmap_bus(v3);
421 struct v3_pci *v3 = bus->sysdata;
428 v3_unmap_bus(v3);
440 struct v3_pci *v3 = data;
441 struct device *dev = v3->dev;
444 status = readw(v3->base + V3_PCI_STAT);
453 writew(status, v3->base + V3_PCI_STAT);
455 status = readb(v3->base + V3_LB_ISTAT);
473 writeb(0, v3->base + V3_LB_ISTAT);
474 if (v3->map)
475 regmap_write(v3->map, INTEGRATOR_SC_PCI_OFFSET,
482 static int v3_integrator_init(struct v3_pci *v3)
486 v3->map =
488 if (IS_ERR(v3->map)) {
489 dev_err(v3->dev, "no syscon\n");
493 regmap_read(v3->map, INTEGRATOR_SC_PCI_OFFSET, &val);
495 regmap_write(v3->map, INTEGRATOR_SC_PCI_OFFSET,
504 writel(0x6200, v3->base + V3_LB_IO_BASE);
508 writeb(0xaa, v3->base + V3_MAIL_DATA);
509 writeb(0x55, v3->base + V3_MAIL_DATA + 4);
510 } while (readb(v3->base + V3_MAIL_DATA) != 0xaa &&
511 readb(v3->base + V3_MAIL_DATA) != 0x55);
514 dev_info(v3->dev, "initialized PCI V3 Integrator/AP integration\n");
519 static int v3_pci_setup_resource(struct v3_pci *v3,
523 struct device *dev = v3->dev;
534 v3->base + V3_LB_BASE2);
536 v3->base + V3_LB_MAP2);
542 v3->pre_mem = mem->start;
543 v3->pre_bus_addr = mem->start - win->offset;
545 mem, &v3->pre_bus_addr);
550 if (v3->non_pre_mem &&
551 (mem->start != v3->non_pre_mem + SZ_256M)) {
557 writel(v3_addr_to_lb_base(v3->pre_mem) |
561 v3->base + V3_LB_BASE1);
562 writew(v3_addr_to_lb_map(v3->pre_bus_addr) |
564 v3->base + V3_LB_MAP1);
567 v3->non_pre_mem = mem->start;
568 v3->non_pre_bus_addr = mem->start - win->offset;
570 mem, &v3->non_pre_bus_addr);
577 writel(v3_addr_to_lb_base(v3->non_pre_mem) |
580 v3->base + V3_LB_BASE0);
581 writew(v3_addr_to_lb_map(v3->non_pre_bus_addr) |
583 v3->base + V3_LB_MAP0);
597 static int v3_get_dma_range_config(struct v3_pci *v3,
601 struct device *dev = v3->dev;
659 dev_err(v3->dev, "illegal dma memory chunk size\n");
675 static int v3_pci_parse_map_dma_ranges(struct v3_pci *v3,
678 struct pci_host_bridge *bridge = pci_host_bridge_from_priv(v3);
679 struct device *dev = v3->dev;
687 ret = v3_get_dma_range_config(v3, entry, &pci_base, &pci_map);
692 writel(pci_base, v3->base + V3_PCI_BASE0);
693 writel(pci_map, v3->base + V3_PCI_MAP0);
695 writel(pci_base, v3->base + V3_PCI_BASE1);
696 writel(pci_map, v3->base + V3_PCI_MAP1);
712 struct v3_pci *v3;
719 host = devm_pci_alloc_host_bridge(dev, sizeof(*v3));
724 v3 = pci_host_bridge_priv(host);
725 host->sysdata = v3;
726 v3->dev = dev;
741 v3->base = devm_ioremap_resource(dev, regs);
742 if (IS_ERR(v3->base))
743 return PTR_ERR(v3->base);
749 if (readl(v3->base + V3_LB_IO_BASE) != (regs->start >> 16))
751 readl(v3->base + V3_LB_IO_BASE), regs);
759 v3->config_mem = regs->start;
760 v3->config_base = devm_ioremap_resource(dev, regs);
761 if (IS_ERR(v3->config_base))
762 return PTR_ERR(v3->config_base);
770 "PCIv3 error", v3);
781 if (readw(v3->base + V3_SYSTEM) & V3_SYSTEM_M_LOCK)
782 writew(V3_SYSTEM_UNLOCK, v3->base + V3_SYSTEM);
785 val = readw(v3->base + V3_PCI_CMD);
787 writew(val, v3->base + V3_PCI_CMD);
790 val = readw(v3->base + V3_SYSTEM);
792 writew(val, v3->base + V3_SYSTEM);
795 val = readw(v3->base + V3_PCI_CFG);
797 writew(val, v3->base + V3_PCI_CFG);
800 val = readw(v3->base + V3_LB_CFG);
805 writew(val, v3->base + V3_LB_CFG);
808 val = readw(v3->base + V3_PCI_CMD);
810 writew(val, v3->base + V3_PCI_CMD);
814 ret = v3_pci_setup_resource(v3, host, win);
820 ret = v3_pci_parse_map_dma_ranges(v3, np);
829 writel(0x00000000, v3->base + V3_PCI_IO_BASE);
837 writew(val, v3->base + V3_PCI_CFG);
848 v3->base + V3_FIFO_PRIORITY);
855 writeb(0, v3->base + V3_LB_ISTAT);
856 val = readw(v3->base + V3_LB_CFG);
858 writew(val, v3->base + V3_LB_CFG);
860 v3->base + V3_LB_IMASK);
864 ret = v3_integrator_init(v3);
870 val = readw(v3->base + V3_PCI_CMD);
872 writew(val, v3->base + V3_PCI_CMD);
875 writeb(0, v3->base + V3_LB_ISTAT);
878 v3->base + V3_LB_IMASK);
881 val = readw(v3->base + V3_SYSTEM);
883 writew(val, v3->base + V3_SYSTEM);
888 val = readw(v3->base + V3_SYSTEM);
890 writew(val, v3->base + V3_SYSTEM);
897 .compatible = "v3,v360epc-pci",
904 .name = "pci-v3-semi",