Lines Matching refs:start
210 mvebu_writel(port, round_down(port->regs.start, SZ_1M), PCIE_BAR_LO_OFF(0));
303 * areas each having a power of two size. We start from the largest
396 desired.base = port->pcie->io.start + desired.remap;
693 resource_size_t start,
698 return start;
712 return round_up(start, max_t(resource_size_t, SZ_64K,
715 return round_up(start, max_t(resource_size_t, SZ_1M,
718 return start;
997 pcie->realio.start = PCIBIOS_MIN_IO;
1036 pci_ioremap_io(i, pcie->io.start + i);