Lines Matching refs:parf
186 void __iomem *parf; /* DT parf */
301 writel(1, pcie->parf + PCIE20_PARF_PHY_CTRL);
366 val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
368 writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
379 pcie->parf + PCIE20_PARF_PCS_DEEMPH);
382 pcie->parf + PCIE20_PARF_PCS_SWING);
383 writel(PHY_RX0_EQ(4), pcie->parf + PCIE20_PARF_CONFIG_BITS);
388 val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
391 writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
395 val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK);
400 writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK);
517 writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR);
520 u32 val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT);
523 writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT);
546 val = readl(pcie->parf + PCIE20_PARF_LTSSM);
548 writel(val, pcie->parf + PCIE20_PARF_LTSSM);
643 val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
645 writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
648 writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR);
651 val = readl(pcie->parf + PCIE20_PARF_SYS_CTRL);
653 writel(val, pcie->parf + PCIE20_PARF_SYS_CTRL);
655 val = readl(pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL);
657 writel(val, pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL);
659 val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2);
661 writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2);
741 res->parf_reset = devm_reset_control_get_exclusive(dev, "parf");
924 val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
926 writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
929 writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR);
932 val = readl(pcie->parf + PCIE20_PARF_SYS_CTRL);
934 writel(val, pcie->parf + PCIE20_PARF_SYS_CTRL);
936 val = readl(pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL);
938 writel(val, pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL);
940 val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2);
942 writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2);
1082 pcie->parf + PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE);
1084 val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
1086 writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
1088 writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR);
1093 pcie->parf + PCIE20_PARF_SYS_CTRL);
1094 writel(0, pcie->parf + PCIE20_PARF_Q2A_FLUSH);
1194 writel(DEVICE_TYPE_RC, pcie->parf + PCIE20_PARF_DEVICE_TYPE);
1197 val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
1199 writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
1202 writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR);
1205 val = readl(pcie->parf + PCIE20_PARF_SYS_CTRL);
1207 writel(val, pcie->parf + PCIE20_PARF_SYS_CTRL);
1209 val = readl(pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL);
1211 writel(val, pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL);
1213 val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2);
1215 writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2);
1396 pcie->parf = devm_platform_ioremap_resource_byname(pdev, "parf");
1397 if (IS_ERR(pcie->parf)) {
1398 ret = PTR_ERR(pcie->parf);