Lines Matching refs:reg
28 u16 reg;
33 reg = dw_pcie_readw_dbi(pci, cap_ptr);
34 cap_id = (reg & 0x00ff);
42 next_cap_ptr = (reg & 0xff00) >> 8;
49 u16 reg;
51 reg = dw_pcie_readw_dbi(pci, PCI_CAPABILITY_LIST);
52 next_cap_ptr = (reg & 0x00ff);
139 u32 dw_pcie_read_dbi(struct dw_pcie *pci, u32 reg, size_t size)
145 return pci->ops->read_dbi(pci, pci->dbi_base, reg, size);
147 ret = dw_pcie_read(pci->dbi_base + reg, size, &val);
155 void dw_pcie_write_dbi(struct dw_pcie *pci, u32 reg, size_t size, u32 val)
160 pci->ops->write_dbi(pci, pci->dbi_base, reg, size, val);
164 ret = dw_pcie_write(pci->dbi_base + reg, size, val);
170 void dw_pcie_write_dbi2(struct dw_pcie *pci, u32 reg, size_t size, u32 val)
175 pci->ops->write_dbi2(pci, pci->dbi_base2, reg, size, val);
179 ret = dw_pcie_write(pci->dbi_base2 + reg, size, val);
184 static u32 dw_pcie_readl_atu(struct dw_pcie *pci, u32 reg)
190 return pci->ops->read_dbi(pci, pci->atu_base, reg, 4);
192 ret = dw_pcie_read(pci->atu_base + reg, 4, &val);
199 static void dw_pcie_writel_atu(struct dw_pcie *pci, u32 reg, u32 val)
204 pci->ops->write_dbi(pci, pci->atu_base, reg, 4, val);
208 ret = dw_pcie_write(pci->atu_base + reg, 4, val);
213 static u32 dw_pcie_readl_ob_unroll(struct dw_pcie *pci, u32 index, u32 reg)
217 return dw_pcie_readl_atu(pci, offset + reg);
220 static void dw_pcie_writel_ob_unroll(struct dw_pcie *pci, u32 index, u32 reg,
225 dw_pcie_writel_atu(pci, offset + reg, val);
328 static u32 dw_pcie_readl_ib_unroll(struct dw_pcie *pci, u32 index, u32 reg)
332 return dw_pcie_readl_atu(pci, offset + reg);
335 static void dw_pcie_writel_ib_unroll(struct dw_pcie *pci, u32 index, u32 reg,
340 dw_pcie_writel_atu(pci, offset + reg, val);