Lines Matching refs:pb
106 static void frob_econtrol(struct parport *pb, unsigned char m,
112 ectr = inb(ECONTROL(pb));
117 outb((ectr & ~m) ^ v, ECONTROL(pb));
201 static int clear_epp_timeout(struct parport *pb)
205 if (!(parport_pc_read_status(pb) & 0x01))
209 parport_pc_read_status(pb);
210 r = parport_pc_read_status(pb);
211 outb(r | 0x01, STATUS(pb)); /* Some reset by writing 1 */
212 outb(r & 0xfe, STATUS(pb)); /* Others by writing 0 */
213 r = parport_pc_read_status(pb);
1397 static int parport_SPP_supported(struct parport *pb)
1407 clear_epp_timeout(pb);
1411 outb(w, CONTROL(pb));
1418 r = inb(CONTROL(pb));
1421 outb(w, CONTROL(pb));
1422 r = inb(CONTROL(pb));
1423 outb(0xc, CONTROL(pb));
1432 pb->base, w, r);
1437 parport_pc_write_data(pb, w);
1438 r = parport_pc_read_data(pb);
1441 parport_pc_write_data(pb, w);
1442 r = parport_pc_read_data(pb);
1451 pb->base, w, r);
1453 pb->base);
1477 static int parport_ECR_present(struct parport *pb)
1479 struct parport_pc_private *priv = pb->private_data;
1482 outb(r, CONTROL(pb));
1483 if ((inb(ECONTROL(pb)) & 0x3) == (r & 0x3)) {
1484 outb(r ^ 0x2, CONTROL(pb)); /* Toggle bit 1 */
1486 r = inb(CONTROL(pb));
1487 if ((inb(ECONTROL(pb)) & 0x2) == (r & 0x2))
1491 if ((inb(ECONTROL(pb)) & 0x3) != 0x1)
1494 ECR_WRITE(pb, 0x34);
1495 if (inb(ECONTROL(pb)) != 0x35)
1499 outb(0xc, CONTROL(pb));
1502 frob_set_mode(pb, ECR_SPP);
1507 outb(0xc, CONTROL(pb));
1529 static int parport_PS2_supported(struct parport *pb)
1533 clear_epp_timeout(pb);
1536 parport_pc_data_reverse(pb);
1538 parport_pc_write_data(pb, 0x55);
1539 if (parport_pc_read_data(pb) != 0x55)
1542 parport_pc_write_data(pb, 0xaa);
1543 if (parport_pc_read_data(pb) != 0xaa)
1547 parport_pc_data_forward(pb);
1550 pb->modes |= PARPORT_MODE_TRISTATE;
1552 struct parport_pc_private *priv = pb->private_data;
1560 static int parport_ECP_supported(struct parport *pb)
1565 struct parport_pc_private *priv = pb->private_data;
1574 ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */
1575 ECR_WRITE(pb, ECR_TST << 5); /* TEST FIFO */
1576 for (i = 0; i < 1024 && !(inb(ECONTROL(pb)) & 0x02); i++)
1577 outb(0xaa, FIFO(pb));
1584 ECR_WRITE(pb, ECR_SPP << 5);
1590 printk(KERN_DEBUG "0x%lx: FIFO is %d bytes\n", pb->base, i);
1593 frob_econtrol(pb, 1<<2, 1<<2);
1594 frob_econtrol(pb, 1<<2, 0);
1596 inb(FIFO(pb));
1598 if (inb(ECONTROL(pb)) & (1<<2))
1605 pb->base, i);
1614 frob_set_mode(pb, ECR_PS2); /* Reset FIFO and enable PS2 */
1615 parport_pc_data_reverse(pb); /* Must be in PS2 mode */
1616 frob_set_mode(pb, ECR_TST); /* Test FIFO */
1617 frob_econtrol(pb, 1<<2, 1<<2);
1618 frob_econtrol(pb, 1<<2, 0);
1620 outb(0xaa, FIFO(pb));
1621 if (inb(ECONTROL(pb)) & (1<<2))
1628 pb->base, i);
1635 ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */
1636 ECR_WRITE(pb, 0xf4); /* Configuration mode */
1637 config = inb(CONFIGA(pb));
1642 pr_warn("0x%lx: Unsupported pword size!\n", pb->base);
1646 pr_warn("0x%lx: Unsupported pword size!\n", pb->base);
1649 pr_warn("0x%lx: Unknown implementation ID\n", pb->base);
1658 pb->base, 8 * pword);
1661 pb->base, config & 0x80 ? "Level" : "Pulses");
1663 configb = inb(CONFIGB(pb));
1665 pb->base, config, configb);
1666 printk(KERN_DEBUG "0x%lx: ECP settings irq=", pb->base);
1679 frob_set_mode(pb, ECR_SPP);
1686 static int intel_bug_present_check_epp(struct parport *pb)
1688 const struct parport_pc_private *priv = pb->private_data;
1693 unsigned char ecr = inb(ECONTROL(pb));
1696 ECR_WRITE(pb, i);
1697 if (clear_epp_timeout(pb)) {
1704 ECR_WRITE(pb, ecr);
1709 static int intel_bug_present(struct parport *pb)
1712 if (pb->dev != NULL) {
1716 return intel_bug_present_check_epp(pb);
1719 static int intel_bug_present(struct parport *pb)
1725 static int parport_ECPPS2_supported(struct parport *pb)
1727 const struct parport_pc_private *priv = pb->private_data;
1734 oecr = inb(ECONTROL(pb));
1735 ECR_WRITE(pb, ECR_PS2 << 5);
1736 result = parport_PS2_supported(pb);
1737 ECR_WRITE(pb, oecr);
1743 static int parport_EPP_supported(struct parport *pb)
1759 if (!clear_epp_timeout(pb))
1763 if (intel_bug_present(pb))
1766 pb->modes |= PARPORT_MODE_EPP;
1769 pb->ops->epp_read_data = parport_pc_epp_read_data;
1770 pb->ops->epp_write_data = parport_pc_epp_write_data;
1771 pb->ops->epp_read_addr = parport_pc_epp_read_addr;
1772 pb->ops->epp_write_addr = parport_pc_epp_write_addr;
1777 static int parport_ECPEPP_supported(struct parport *pb)
1779 struct parport_pc_private *priv = pb->private_data;
1786 oecr = inb(ECONTROL(pb));
1788 ECR_WRITE(pb, 0x80);
1789 outb(0x04, CONTROL(pb));
1790 result = parport_EPP_supported(pb);
1792 ECR_WRITE(pb, oecr);
1796 pb->ops->epp_read_data = parport_pc_ecpepp_read_data;
1797 pb->ops->epp_write_data = parport_pc_ecpepp_write_data;
1798 pb->ops->epp_read_addr = parport_pc_ecpepp_read_addr;
1799 pb->ops->epp_write_addr = parport_pc_ecpepp_write_addr;
1808 static int parport_PS2_supported(struct parport *pb) { return 0; }
1810 static int parport_ECP_supported(struct parport *pb)
1815 static int parport_EPP_supported(struct parport *pb)
1820 static int parport_ECPEPP_supported(struct parport *pb)
1825 static int parport_ECPPS2_supported(struct parport *pb)
1835 static int programmable_irq_support(struct parport *pb)
1838 unsigned char oecr = inb(ECONTROL(pb));
1843 ECR_WRITE(pb, ECR_CNF << 5); /* Configuration MODE */
1845 intrLine = (inb(CONFIGB(pb)) >> 3) & 0x07;
1848 ECR_WRITE(pb, oecr);
1852 static int irq_probe_ECP(struct parport *pb)
1859 ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */
1860 ECR_WRITE(pb, (ECR_TST << 5) | 0x04);
1861 ECR_WRITE(pb, ECR_TST << 5);
1864 for (i = 0; i < 1024 && !(inb(ECONTROL(pb)) & 0x02) ; i++)
1865 outb(0xaa, FIFO(pb));
1867 pb->irq = probe_irq_off(irqs);
1868 ECR_WRITE(pb, ECR_SPP << 5);
1870 if (pb->irq <= 0)
1871 pb->irq = PARPORT_IRQ_NONE;
1873 return pb->irq;
1880 static int irq_probe_EPP(struct parport *pb)
1888 if (pb->modes & PARPORT_MODE_PCECR)
1889 oecr = inb(ECONTROL(pb));
1893 if (pb->modes & PARPORT_MODE_PCECR)
1894 frob_econtrol(pb, 0x10, 0x10);
1896 clear_epp_timeout(pb);
1897 parport_pc_frob_control(pb, 0x20, 0x20);
1898 parport_pc_frob_control(pb, 0x10, 0x10);
1899 clear_epp_timeout(pb);
1904 parport_pc_read_epp(pb);
1907 pb->irq = probe_irq_off(irqs);
1908 if (pb->modes & PARPORT_MODE_PCECR)
1909 ECR_WRITE(pb, oecr);
1910 parport_pc_write_control(pb, 0xc);
1912 if (pb->irq <= 0)
1913 pb->irq = PARPORT_IRQ_NONE;
1915 return pb->irq;
1919 static int irq_probe_SPP(struct parport *pb)
1932 static int parport_irq_probe(struct parport *pb)
1934 struct parport_pc_private *priv = pb->private_data;
1937 pb->irq = programmable_irq_support(pb);
1939 if (pb->irq == PARPORT_IRQ_NONE)
1940 pb->irq = irq_probe_ECP(pb);
1943 if ((pb->irq == PARPORT_IRQ_NONE) && priv->ecr &&
1944 (pb->modes & PARPORT_MODE_EPP))
1945 pb->irq = irq_probe_EPP(pb);
1947 clear_epp_timeout(pb);
1949 if (pb->irq == PARPORT_IRQ_NONE && (pb->modes & PARPORT_MODE_EPP))
1950 pb->irq = irq_probe_EPP(pb);
1952 clear_epp_timeout(pb);
1954 if (pb->irq == PARPORT_IRQ_NONE)
1955 pb->irq = irq_probe_SPP(pb);
1957 if (pb->irq == PARPORT_IRQ_NONE)
1958 pb->irq = get_superio_irq(pb);
1960 return pb->irq;