Lines Matching defs:WRITE_REG32
141 #define WRITE_REG32(value, addr) writel(value, addr)
222 WRITE_REG32(0x1, d->hba.base_addr + LBA_ARB_MASK); \
228 WRITE_REG32(error_config | LBA_SMART_MODE, d->hba.base_addr + LBA_ERROR_CONFIG); \
237 WRITE_REG32(tok | PCI_VENDOR_ID, (d)->hba.base_addr + LBA_PCI_CFG_ADDR);\
247 WRITE_REG32(~0, (d)->hba.base_addr + LBA_PCI_CFG_DATA); \
289 WRITE_REG32(status_control | CLEAR_ERRLOG_ENABLE, base + LBA_STAT_CTL); \
301 WRITE_REG32(status_control | CLEAR_ERRLOG, base + LBA_STAT_CTL); \
307 WRITE_REG32(((addr) & ~3), (d)->hba.base_addr + LBA_PCI_CFG_ADDR);
310 WRITE_REG32(((addr) & ~3), (d)->hba.base_addr + LBA_PCI_CFG_ADDR); \
323 WRITE_REG32(status_control, base + LBA_STAT_CTL); \
327 WRITE_REG32(error_config, base + LBA_ERROR_CONFIG); \
331 WRITE_REG32(arb_mask, base + LBA_ARB_MASK); \
418 case 4: WRITE_REG32(data, data_reg); break;
460 case 4: WRITE_REG32(data, d->hba.base_addr + LBA_PCI_CFG_DATA);
533 WRITE_REG32(data, data_reg);
1400 WRITE_REG32(stat, d->hba.base_addr + LBA_ERROR_CONFIG);
1420 WRITE_REG32(stat | HF_ENABLE, d->hba.base_addr + LBA_STAT_CTL);
1422 WRITE_REG32(stat & ~HF_ENABLE, d->hba.base_addr + LBA_STAT_CTL);
1444 WRITE_REG32(0x3, d->hba.base_addr + LBA_ARB_MASK);
1709 WRITE_REG32( imask, base_addr + LBA_IMASK);
1710 WRITE_REG32( ibase, base_addr + LBA_IBASE);