Lines Matching defs:MESON_MX_EFUSE_CNTL1
22 #define MESON_MX_EFUSE_CNTL1 0x04
72 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
83 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
98 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
102 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
105 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
109 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
112 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
119 readl(efuse->base + MESON_MX_EFUSE_CNTL1);
121 err = readl_poll_timeout_atomic(efuse->base + MESON_MX_EFUSE_CNTL1,
147 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,
162 meson_mx_efuse_mask_bits(efuse, MESON_MX_EFUSE_CNTL1,