Lines Matching refs:path
84 u32 path, i;
99 for (path = 0; path < DACK_PATH_8822C; path++) {
102 val = rtw_read_rf(rtwdev, path, reg, RFREG_MASK);
103 backup_rf[path * i + i].reg = reg;
104 backup_rf[path * i + i].val = val;
113 u32 path, i;
119 for (path = 0; path < DACK_PATH_8822C; path++) {
121 val = backup_rf[path * i + i].val;
122 reg = backup_rf[path * i + i].reg;
123 rtw_write_rf(rtwdev, path, reg, RFREG_MASK, val);
208 static u32 rtw8822c_get_path_write_addr(u8 path)
212 switch (path) {
227 static u32 rtw8822c_get_path_read_addr(u8 path)
231 switch (path) {
343 rtw_dbg(rtwdev, RTW_DBG_RFK, "[DACK] RF path-A=0x%05x\n", rf_a);
344 rtw_dbg(rtwdev, RTW_DBG_RFK, "[DACK] RF path-B=0x%05x\n", rf_b);
367 u8 path, u32 *adc_ic, u32 *adc_qc)
375 rtw_dbg(rtwdev, RTW_DBG_RFK, "[DACK] ADCK path(%d)\n", path);
377 base_addr = rtw8822c_get_path_write_addr(path);
378 switch (path) {
392 if (path == RF_PATH_B)
419 dm_info->dack_adck[path] = temp;
440 /* release pull low switch on IQ path */
441 rtw_write_rf(rtwdev, path, 0x8f, BIT(13), 0x1);
444 static void rtw8822c_dac_cal_step1(struct rtw_dev *rtwdev, u8 path)
450 base_addr = rtw8822c_get_path_write_addr(path);
451 read_addr = rtw8822c_get_path_read_addr(path);
453 rtw_write32(rtwdev, base_addr + 0x68, dm_info->dack_adck[path]);
455 if (path == RF_PATH_A) {
490 u8 path, u32 *ic_out, u32 *qc_out)
495 base_addr = rtw8822c_get_path_write_addr(path);
538 static void rtw8822c_dac_cal_step3(struct rtw_dev *rtwdev, u8 path,
548 base_addr = rtw8822c_get_path_write_addr(path);
549 read_addr = rtw8822c_get_path_read_addr(path);
615 static void rtw8822c_dac_cal_step4(struct rtw_dev *rtwdev, u8 path)
617 u32 base_addr = rtw8822c_get_path_write_addr(path);
626 u8 path, u8 vec, u32 w_addr, u32 r_addr)
638 dm_info->dack_msbk[path][vec][i] = val;
642 static void rtw8822c_dac_cal_backup_path(struct rtw_dev *rtwdev, u8 path)
648 if (WARN_ON(path >= 2))
652 w_addr = rtw8822c_get_path_write_addr(path) + 0xb0;
653 r_addr = rtw8822c_get_path_read_addr(path) + 0x10;
654 rtw8822c_dac_cal_backup_vec(rtwdev, path, 0, w_addr, r_addr);
657 w_addr = rtw8822c_get_path_write_addr(path) + 0xb0 + w_off;
658 r_addr = rtw8822c_get_path_read_addr(path) + 0x10 + r_off;
659 rtw8822c_dac_cal_backup_vec(rtwdev, path, 1, w_addr, r_addr);
697 /* backup path-A I/Q */
702 /* backup path-B I/Q */
816 static bool rtw8822c_dac_cal_restore_path(struct rtw_dev *rtwdev, u8 path)
825 w_i = rtw8822c_get_path_write_addr(path) + 0xb0;
826 r_i = rtw8822c_get_path_read_addr(path) + 0x08;
827 w_q = rtw8822c_get_path_write_addr(path) + 0xb0 + w_off;
828 r_q = rtw8822c_get_path_read_addr(path) + 0x08 + r_off;
835 value = dm_info->dack_msbk[path][0][i];
848 value = dm_info->dack_msbk[path][1][i];
879 /* sample the first element for both path's IQ vector */
933 /* path-A */
949 /* path-B */
976 rtw_dbg(rtwdev, RTW_DBG_RFK, "[DACK] path A: ic=0x%x, qc=0x%x\n", ic_a, qc_a);
977 rtw_dbg(rtwdev, RTW_DBG_RFK, "[DACK] path B: ic=0x%x, qc=0x%x\n", ic_b, qc_b);
978 rtw_dbg(rtwdev, RTW_DBG_RFK, "[DACK] path A: i=0x%x, q=0x%x\n", i_a, q_a);
979 rtw_dbg(rtwdev, RTW_DBG_RFK, "[DACK] path B: i=0x%x, q=0x%x\n", i_b, q_b);
1004 u8 path;
1006 for (path = 0; path < rtwdev->hal.rf_path_num; path++) {
1007 rtw_write_rf(rtwdev, path, 0xee, BIT(19), 1);
1008 RF_SET_POWER_TRIM(path, 0x0, 0);
1009 RF_SET_POWER_TRIM(path, 0x1, 1);
1010 RF_SET_POWER_TRIM(path, 0x2, 2);
1011 RF_SET_POWER_TRIM(path, 0x3, 2);
1012 RF_SET_POWER_TRIM(path, 0x4, 3);
1013 RF_SET_POWER_TRIM(path, 0x5, 4);
1014 RF_SET_POWER_TRIM(path, 0x6, 5);
1015 RF_SET_POWER_TRIM(path, 0x7, 6);
1016 RF_SET_POWER_TRIM(path, 0x8, 7);
1017 RF_SET_POWER_TRIM(path, 0x9, 3);
1018 RF_SET_POWER_TRIM(path, 0xa, 4);
1019 RF_SET_POWER_TRIM(path, 0xb, 5);
1020 RF_SET_POWER_TRIM(path, 0xc, 6);
1021 RF_SET_POWER_TRIM(path, 0xd, 7);
1022 RF_SET_POWER_TRIM(path, 0xe, 7);
1023 rtw_write_rf(rtwdev, path, 0xee, BIT(19), 0);
1030 u8 pg_pwr = 0xff, i, path, idx;
1049 for (path = 0; path < rtwdev->hal.rf_path_num; path++) {
1050 rtw_read8_physical_efuse(rtwdev, rf_efuse_5g[path][i],
1056 bb_gain[path][idx] = FIELD_GET(PPG_5G_MASK, pg_pwr);
1068 u8 pg_therm = 0xff, thermal[2] = {0}, path;
1070 for (path = 0; path < rtwdev->hal.rf_path_num; path++) {
1071 rtw_read8_physical_efuse(rtwdev, rf_efuse[path], &pg_therm);
1077 thermal[path] = FIELD_GET(GENMASK(3, 1), pg_therm);
1078 thermal[path] |= FIELD_PREP(BIT(3), pg_therm & BIT(0));
1079 rtw_write_rf(rtwdev, path, 0x43, RF_THEMAL_MASK, thermal[path]);
1087 u8 pg_pa_bias = 0xff, path;
1089 for (path = 0; path < rtwdev->hal.rf_path_num; path++) {
1090 rtw_read8_physical_efuse(rtwdev, rf_efuse_2g[path],
1095 rtw_write_rf(rtwdev, path, 0x60, RF_PABIAS_2G_MASK, pg_pa_bias);
1097 for (path = 0; path < rtwdev->hal.rf_path_num; path++) {
1098 rtw_read8_physical_efuse(rtwdev, rf_efuse_5g[path],
1101 rtw_write_rf(rtwdev, path, 0x60, RF_PABIAS_5G_MASK, pg_pa_bias);
1117 u8 path;
1119 for (path = RF_PATH_A; path < RTW_RF_PATH_MAX; path++) {
1120 dm_info->delta_power_index[path] = 0;
1121 ewma_thermal_init(&dm_info->avg_thermal[path]);
1122 dm_info->thermal_avg[path] = 0xff;
1766 int path;
1789 for (path = 0; path <= rtwdev->hal.rf_path_num; path++) {
1790 rssi = rtw_phy_rf_power_2_rssi(&pkt_stat->rx_power[path], 1);
1791 dm_info->rssi[path] = rssi;
1809 int path;
1842 for (path = 0; path <= rtwdev->hal.rf_path_num; path++) {
1843 rssi = rtw_phy_rf_power_2_rssi(&pkt_stat->rx_power[path], 1);
1844 dm_info->rssi[path] = rssi;
1845 dm_info->rx_snr[path] = pkt_stat->rx_snr[path] >> 1;
1846 dm_info->cfo_tail[path] = (pkt_stat->cfo_tail[path] * 5) >> 1;
1848 rx_evm = pkt_stat->rx_evm[path];
1856 dm_info->rx_evm_dbm[path] = evm_dbm;
1928 u8 path;
1930 for (path = 0; path < hal->rf_path_num; path++) {
1932 rtw_write32_mask(rtwdev, txref_cck[path], 0x7f0000,
1933 tx_pwr_ref_cck[path]);
1935 for (path = 0; path < hal->rf_path_num; path++) {
1937 rtw_write32_mask(rtwdev, txref_ofdm[path], 0x1fc00,
1938 tx_pwr_ref_ofdm[path]);
2009 rtw_info(rtwdev, "unsupported tx path 0x%x\n", antenna_tx);
2013 /* path B only is not available for RX */
2019 rtw_info(rtwdev, "unsupported rx path 0x%x\n", antenna_rx);
2220 * or antenna path is separated
2454 static void rtw8822c_dpk_rxbb_dc_cal(struct rtw_dev *rtwdev, u8 path)
2456 rtw_write_rf(rtwdev, path, 0x92, RFREG_MASK, 0x84800);
2458 rtw_write_rf(rtwdev, path, 0x92, RFREG_MASK, 0x84801);
2460 rtw_write_rf(rtwdev, path, 0x92, RFREG_MASK, 0x84800);
2463 static u8 rtw8822c_dpk_dc_corr_check(struct rtw_dev *rtwdev, u8 path)
2520 u8 path;
2522 for (path = 0; path < rtwdev->hal.rf_path_num; path++) {
2523 rtw_write_rf(rtwdev, path, RF_RXAGC_OFFSET, RFREG_MASK, 0x0);
2524 rtw_write32(rtwdev, REG_NCTL0, 0x8 | (path << 1));
2537 static u32 rtw8822c_dpk_rf_setting(struct rtw_dev *rtwdev, u8 path)
2541 rtw_write_rf(rtwdev, path, RF_MODE_TRXAGC, RFREG_MASK, 0x50017);
2542 ori_txbb = rtw_read_rf(rtwdev, path, RF_TX_GAIN, RFREG_MASK);
2544 rtw_write_rf(rtwdev, path, RF_DEBUG, BIT_DE_TX_GAIN, 0x1);
2545 rtw_write_rf(rtwdev, path, RF_DEBUG, BIT_DE_PWR_TRIM, 0x1);
2546 rtw_write_rf(rtwdev, path, RF_TX_GAIN_OFFSET, BIT_TX_OFFSET_VAL, 0x0);
2547 rtw_write_rf(rtwdev, path, RF_TX_GAIN, RFREG_MASK, ori_txbb);
2550 rtw_write_rf(rtwdev, path, RF_TX_GAIN_OFFSET, BIT_LB_ATT, 0x1);
2551 rtw_write_rf(rtwdev, path, RF_RXG_GAIN, BIT_RXG_GAIN, 0x0);
2553 rtw_write_rf(rtwdev, path, RF_TXA_LB_SW, BIT_TXA_LB_ATT, 0x0);
2554 rtw_write_rf(rtwdev, path, RF_TXA_LB_SW, BIT_LB_ATT, 0x6);
2555 rtw_write_rf(rtwdev, path, RF_TXA_LB_SW, BIT_LB_SW, 0x1);
2556 rtw_write_rf(rtwdev, path, RF_RXA_MIX_GAIN, BIT_RXA_MIX_GAIN, 0);
2559 rtw_write_rf(rtwdev, path, RF_MODE_TRXAGC, BIT_RXAGC, 0xf);
2560 rtw_write_rf(rtwdev, path, RF_DEBUG, BIT_DE_TRXBW, 0x1);
2561 rtw_write_rf(rtwdev, path, RF_BW_TRXBB, BIT_BW_RXBB, 0x0);
2564 rtw_write_rf(rtwdev, path, RF_BW_TRXBB, BIT_BW_TXBB, 0x2);
2566 rtw_write_rf(rtwdev, path, RF_BW_TRXBB, BIT_BW_TXBB, 0x1);
2568 rtw_write_rf(rtwdev, path, RF_EXT_TIA_BW, BIT(1), 0x1);
2575 static u16 rtw8822c_dpk_get_cmd(struct rtw_dev *rtwdev, u8 action, u8 path)
2582 cmd = 0x14 + path;
2585 cmd = 0x16 + path + bw;
2588 cmd = 0x1a + path;
2591 cmd = 0x1c + path + bw;
2600 static u8 rtw8822c_dpk_one_shot(struct rtw_dev *rtwdev, u8 path, u8 action)
2618 0x8 | (path << 1));
2621 dpk_cmd = rtw8822c_dpk_get_cmd(rtwdev, action, path);
2630 0x8 | (path << 1));
2641 static u16 rtw8822c_dpk_dgain_read(struct rtw_dev *rtwdev, u8 path)
2653 static u8 rtw8822c_dpk_thermal_read(struct rtw_dev *rtwdev, u8 path)
2655 rtw_write_rf(rtwdev, path, RF_T_METER, BIT(19), 0x1);
2656 rtw_write_rf(rtwdev, path, RF_T_METER, BIT(19), 0x0);
2657 rtw_write_rf(rtwdev, path, RF_T_METER, BIT(19), 0x1);
2660 return (u8)rtw_read_rf(rtwdev, path, RF_T_METER, 0x0007e);
2663 static u32 rtw8822c_dpk_pas_read(struct rtw_dev *rtwdev, u8 path)
2667 rtw_write32(rtwdev, REG_NCTL0, 0x8 | (path << 1));
2712 static u8 rtw8822c_dpk_gainloss_result(struct rtw_dev *rtwdev, u8 path)
2716 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1));
2727 static u8 rtw8822c_dpk_agc_gain_chk(struct rtw_dev *rtwdev, u8 path,
2733 rtw8822c_dpk_one_shot(rtwdev, path, RTW_DPK_DAGC);
2734 dgain = rtw8822c_dpk_dgain_read(rtwdev, path);
2744 static u8 rtw8822c_dpk_agc_loss_chk(struct rtw_dev *rtwdev, u8 path)
2748 loss = rtw8822c_dpk_pas_read(rtwdev, path);
2768 u8 path;
2776 data->txbb = (u8)rtw_read_rf(rtwdev, data->path, RF_TX_GAIN,
2778 data->pga = (u8)rtw_read_rf(rtwdev, data->path, RF_MODE_TRXAGC,
2786 state = rtw8822c_dpk_agc_gain_chk(rtwdev, data->path,
2807 rtw_write_rf(rtwdev, data->path, RF_MODE_TRXAGC, BIT_RXAGC, 0xc);
2809 rtw_write_rf(rtwdev, data->path, RF_MODE_TRXAGC, BIT_RXAGC, 0x0);
2822 rtw_write_rf(rtwdev, data->path, RF_MODE_TRXAGC, BIT_RXAGC, 0xc);
2824 rtw_write_rf(rtwdev, data->path, RF_MODE_TRXAGC, BIT_RXAGC, 0xf);
2844 rtw_write_rf(rtwdev, data->path, RF_TX_GAIN, BIT_GAIN_TXBB, data->txbb);
2865 u8 path = data->path;
2868 rtw8822c_dpk_one_shot(rtwdev, path, RTW_DPK_GAIN_LOSS);
2869 state = rtw8822c_dpk_agc_loss_chk(rtwdev, path);
2880 static u8 rtw8822c_dpk_pas_agc(struct rtw_dev *rtwdev, u8 path,
2889 data.path = path;
2935 static void rtw8822c_dpk_coef_tbl_apply(struct rtw_dev *rtwdev, u8 path)
2943 dpk_info->coef[path][i] = rtw8822c_dpk_coef_transfer(rtwdev);
2947 static void rtw8822c_dpk_get_coef(struct rtw_dev *rtwdev, u8 path)
2951 if (path == RF_PATH_A) {
2954 } else if (path == RF_PATH_B) {
2959 rtw8822c_dpk_coef_tbl_apply(rtwdev, path);
2962 static u8 rtw8822c_dpk_coef_read(struct rtw_dev *rtwdev, u8 path)
2969 coef_i = FIELD_GET(0x1fff0000, dpk_info->coef[path][addr]);
2970 coef_q = FIELD_GET(0x1fff, dpk_info->coef[path][addr]);
2980 static void rtw8822c_dpk_coef_write(struct rtw_dev *rtwdev, u8 path, u8 result)
2997 coef = dpk_info->coef[path][addr];
2999 rtw_write32(rtwdev, reg[path] + addr * 4, coef);
3004 u8 path, u8 result)
3008 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1));
3015 dpk_info->result[path] = result;
3016 dpk_info->dpk_txagc[path] = rtw_read8(rtwdev, REG_DPD_AGC);
3018 rtw8822c_dpk_coef_write(rtwdev, path, result);
3021 static u32 rtw8822c_dpk_gainloss(struct rtw_dev *rtwdev, u8 path)
3026 ori_txbb = rtw8822c_dpk_rf_setting(rtwdev, path);
3027 ori_txagc = (u8)rtw_read_rf(rtwdev, path, RF_MODE_TRXAGC, BIT_TXAGC);
3029 rtw8822c_dpk_rxbb_dc_cal(rtwdev, path);
3030 rtw8822c_dpk_one_shot(rtwdev, path, RTW_DPK_DAGC);
3031 rtw8822c_dpk_dgain_read(rtwdev, path);
3033 if (rtw8822c_dpk_dc_corr_check(rtwdev, path)) {
3034 rtw8822c_dpk_rxbb_dc_cal(rtwdev, path);
3035 rtw8822c_dpk_one_shot(rtwdev, path, RTW_DPK_DAGC);
3036 rtw8822c_dpk_dc_corr_check(rtwdev, path);
3039 t1 = rtw8822c_dpk_thermal_read(rtwdev, path);
3040 tx_bb = rtw8822c_dpk_pas_agc(rtwdev, path, false, true);
3041 tx_agc_search = rtw8822c_dpk_gainloss_result(rtwdev, path);
3048 rtw_write_rf(rtwdev, path, RF_TX_GAIN, BIT_GAIN_TXBB, tx_bb);
3052 t2 = rtw8822c_dpk_thermal_read(rtwdev, path);
3054 dpk_info->thermal_dpk_delta[path] = abs(t2 - t1);
3059 static u8 rtw8822c_dpk_by_path(struct rtw_dev *rtwdev, u32 tx_agc, u8 path)
3063 result = rtw8822c_dpk_one_shot(rtwdev, path, RTW_DPK_DO_DPK);
3065 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1));
3069 rtw_write_rf(rtwdev, path, RF_MODE_TRXAGC, RFREG_MASK, 0x33e14);
3071 rtw8822c_dpk_get_coef(rtwdev, path);
3076 static void rtw8822c_dpk_cal_gs(struct rtw_dev *rtwdev, u8 path)
3081 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1));
3089 if (path == RF_PATH_A) {
3106 0x05020000 | (BIT(path) << 28));
3114 0x05020008 | (BIT(path) << 28));
3117 rtw_write32_mask(rtwdev, REG_DPD_CTL0, MASKBYTE3, 0x8 | path);
3119 rtw8822c_dpk_one_shot(rtwdev, path, RTW_DPK_CAL_PWR);
3122 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1));
3127 if (path == RF_PATH_A)
3138 if (path == RF_PATH_A)
3143 dpk_info->dpk_gs[path] = tmp_gs;
3151 u8 path;
3163 for (path = 0; path < rtwdev->hal.rf_path_num; path++) {
3164 i_scaling = 0x16c00 / dpk_info->dpk_gs[path];
3166 rtw_write32_mask(rtwdev, 0x1b18 + offset[path], MASKHWORD,
3168 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0 + offset[path],
3170 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0 + offset[path],
3172 rtw_write32_mask(rtwdev, REG_DPD_CTL0_S0 + offset[path],
3174 rtw_write32_mask(rtwdev, REG_DPD_CTL1_S0 + offset[path],
3179 static void rtw8822c_dpk_on(struct rtw_dev *rtwdev, u8 path)
3183 rtw8822c_dpk_one_shot(rtwdev, path, RTW_DPK_DPK_ON);
3185 rtw_write32_mask(rtwdev, REG_NCTL0, BIT_SUBPAGE, 0x8 | (path << 1));
3188 if (test_bit(path, dpk_info->dpk_path_ok))
3189 rtw8822c_dpk_cal_gs(rtwdev, path);
3193 u32 dpk_txagc, u8 path)
3198 if (rtw8822c_dpk_coef_read(rtwdev, path))
3206 rtw8822c_dpk_fill_result(rtwdev, dpk_txagc, path, result);
3214 u8 path;
3216 for (path = 0; path < rtwdev->hal.rf_path_num; path++) {
3217 clear_bit(path, dpk_info->dpk_path_ok);
3219 0x8 | (path << 1));
3222 dpk_info->dpk_txagc[path] = 0;
3223 dpk_info->result[path] = 0;
3224 dpk_info->dpk_gs[path] = 0x5b;
3225 dpk_info->pre_pwsf[path] = 0;
3226 dpk_info->thermal_dpk[path] = rtw8822c_dpk_thermal_read(rtwdev,
3227 path);
3231 static void rtw8822c_dpk_calibrate(struct rtw_dev *rtwdev, u8 path)
3237 rtw_dbg(rtwdev, RTW_DBG_RFK, "[DPK] s%d dpk start\n", path);
3239 dpk_txagc = rtw8822c_dpk_gainloss(rtwdev, path);
3241 dpk_fail = rtw8822c_dpk_by_path(rtwdev, dpk_txagc, path);
3243 if (!rtw8822c_dpk_check_pass(rtwdev, dpk_fail, dpk_txagc, path))
3246 rtw_dbg(rtwdev, RTW_DBG_RFK, "[DPK] s%d dpk finish\n", path);
3248 if (dpk_info->result[path])
3249 set_bit(path, dpk_info->dpk_path_ok);
3286 u8 path;
3293 for (path = 0; path < rtwdev->hal.rf_path_num; path++) {
3295 0x8 | (path << 1));
3301 rtw_write8(rtwdev, REG_DPD_AGC, dpk_info->dpk_txagc[path]);
3303 rtw8822c_dpk_coef_write(rtwdev, path,
3304 test_bit(path, dpk_info->dpk_path_ok));
3306 rtw8822c_dpk_one_shot(rtwdev, path, RTW_DPK_DPK_ON);
3310 if (path == RF_PATH_A)
3312 dpk_info->dpk_gs[path]);
3315 dpk_info->dpk_gs[path]);
3350 u8 path;
3359 for (path = RF_PATH_A; path < DPK_RF_PATH_NUM; path++)
3360 ewma_thermal_init(&dpk_info->avg_thermal[path]);
3376 for (path = 0; path < rtwdev->hal.rf_path_num; path++)
3377 rtw8822c_dpk_rxbb_dc_cal(rtwdev, path);
3390 u8 path;
3397 for (path = 0; path < DPK_RF_PATH_NUM; path++) {
3398 thermal_value[path] = rtw8822c_dpk_thermal_read(rtwdev, path);
3399 ewma_thermal_add(&dpk_info->avg_thermal[path],
3400 thermal_value[path]);
3401 thermal_value[path] =
3402 ewma_thermal_read(&dpk_info->avg_thermal[path]);
3403 delta_dpk[path] = dpk_info->thermal_dpk[path] -
3404 thermal_value[path];
3405 offset[path] = delta_dpk[path] -
3406 dpk_info->thermal_dpk_delta[path];
3407 offset[path] &= 0x7f;
3409 if (offset[path] != dpk_info->pre_pwsf[path]) {
3411 0x8 | (path << 1));
3413 offset[path]);
3414 dpk_info->pre_pwsf[path] = offset[path];
3513 static void rtw8822c_pwr_track_stats(struct rtw_dev *rtwdev, u8 path)
3517 if (rtwdev->efuse.thermal_meter[path] == 0xff)
3520 thermal_value = rtw_read_rf(rtwdev, path, RF_T_METER, 0x7e);
3521 rtw_phy_pwrtrack_avg(rtwdev, thermal_value, path);
3526 u8 path)
3531 delta = rtw_phy_pwrtrack_get_delta(rtwdev, path);
3532 dm_info->delta_power_index[path] =
3533 rtw_phy_pwrtrack_get_pwridx(rtwdev, swing_table, path, path,
3535 rtw8822c_pwrtrack_set(rtwdev, path);