Lines Matching refs:MASKLWORD
287 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa501);
290 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa500);
293 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa005);
317 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa501);
320 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa500);
323 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa005);
326 rtw_write32s_mask(rtwdev, REG_TRSW, MASKLWORD, 0xa5a5);
606 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x0000);
609 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, 0x1525);
732 rtw_write32_mask(rtwdev, REG_AGCTR_A, MASKLWORD, 0x3231);
734 rtw_write32_mask(rtwdev, REG_AGCTR_A, MASKLWORD, 0x1111);
737 rtw_write32_mask(rtwdev, REG_AGCTR_B, MASKLWORD, 0x3231);
739 rtw_write32_mask(rtwdev, REG_AGCTR_B, MASKLWORD, 0x1111);
1279 rtw_coex_write_indirect_reg(rtwdev, LTE_WL_TRX_CTRL, MASKLWORD, 0xffff);
1282 rtw_coex_write_indirect_reg(rtwdev, LTE_BT_TRX_CTRL, MASKLWORD, 0xffff);
2414 {0x42a, MASKLWORD, RTW_REG_DOMAIN_MAC16},
2417 {0x454, MASKLWORD, RTW_REG_DOMAIN_MAC16},