Lines Matching refs:path
151 u8 path;
158 for (path = 0; path < hal->rf_path_num; path++) {
159 addr = chip->dig[path].addr;
160 mask = chip->dig[path].mask;
659 u8 path;
661 for (path = 0; path < path_num; path++) {
662 power = rf_power[path];
696 rtw_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
723 rtw_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
741 /* toggle read edge of path A */
770 rtw_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
808 rtw_err(rtwdev, "unsupported rf path (%d)\n", rf_path);
1799 WARN(1, "invalid arguments, band=%d, bw=%d, path=%d, rate=%d, ch=%d\n",
1804 void rtw_get_tx_power_params(struct rtw_dev *rtwdev, u8 path, u8 rate, u8 bw,
1816 pwr_idx = &rtwdev->efuse.txpwr_idx_table[path];
1825 *offset = hal->tx_pwr_by_rate_offset_2g[path][rate];
1831 *offset = hal->tx_pwr_by_rate_offset_5g[path][rate];
1834 *limit = rtw_phy_get_tx_power_limit(rtwdev, band, bw, path,
1867 u8 ch, u8 path, u8 rs)
1886 pwr_idx = rtw_phy_get_tx_power_index(rtwdev, path, rate,
1888 hal->tx_pwr_tbl[path][rate] = pwr_idx;
1892 /* set tx power level by path for each rates, note that the order of the rates
1898 u8 ch, u8 path)
1910 rtw_phy_set_tx_power_index_by_rs(rtwdev, ch, path, rs);
1917 u8 path;
1921 for (path = 0; path < hal->rf_path_num; path++)
1922 rtw_phy_set_tx_power_level_by_path(rtwdev, channel, path);
1930 rtw_phy_tx_power_by_rate_config_by_path(struct rtw_hal *hal, u8 path,
1941 base_2g = hal->tx_pwr_by_rate_offset_2g[path][base_idx];
1942 base_5g = hal->tx_pwr_by_rate_offset_5g[path][base_idx];
1943 hal->tx_pwr_by_rate_base_2g[path][rs] = base_2g;
1944 hal->tx_pwr_by_rate_base_5g[path][rs] = base_5g;
1947 hal->tx_pwr_by_rate_offset_2g[path][rate_idx] -= base_2g;
1948 hal->tx_pwr_by_rate_offset_5g[path][rate_idx] -= base_5g;
1954 u8 path;
1956 for (path = 0; path < RTW_RF_PATH_MAX; path++) {
1957 rtw_phy_tx_power_by_rate_config_by_path(hal, path,
1960 rtw_phy_tx_power_by_rate_config_by_path(hal, path,
1963 rtw_phy_tx_power_by_rate_config_by_path(hal, path,
1966 rtw_phy_tx_power_by_rate_config_by_path(hal, path,
1969 rtw_phy_tx_power_by_rate_config_by_path(hal, path,
1972 rtw_phy_tx_power_by_rate_config_by_path(hal, path,
2027 u8 regd, path, rate, rs, bw;
2030 for (path = 0; path < RTW_RF_PATH_MAX; path++) {
2032 hal->tx_pwr_by_rate_offset_2g[path][rate] = 0;
2033 hal->tx_pwr_by_rate_offset_5g[path][rate] = 0;
2087 void rtw_phy_pwrtrack_avg(struct rtw_dev *rtwdev, u8 thermal, u8 path)
2091 ewma_thermal_add(&dm_info->avg_thermal[path], thermal);
2092 dm_info->thermal_avg[path] =
2093 ewma_thermal_read(&dm_info->avg_thermal[path]);
2098 u8 path)
2101 u8 avg = ewma_thermal_read(&dm_info->avg_thermal[path]);
2110 u8 rtw_phy_pwrtrack_get_delta(struct rtw_dev *rtwdev, u8 path)
2115 therm_avg = dm_info->thermal_avg[path];
2116 therm_efuse = rtwdev->efuse.thermal_meter[path];