Lines Matching refs:bw
1323 u8 bw, u8 rs, u8 ch, s8 pwr_limit)
1334 if (regd >= RTW_REGD_MAX || bw >= RTW_CHANNEL_WIDTH_MAX ||
1337 "wrong txpwr_lmt regd=%u, band=%u bw=%u, rs=%u, ch_idx=%u, pwr_limit=%d\n",
1338 regd, band, bw, rs, ch_idx, pwr_limit);
1343 hal->tx_pwr_limit_2g[regd][bw][rs][ch_idx] = pwr_limit;
1344 ww = hal->tx_pwr_limit_2g[RTW_REGD_WW][bw][rs][ch_idx];
1346 hal->tx_pwr_limit_2g[RTW_REGD_WW][bw][rs][ch_idx] = ww;
1348 hal->tx_pwr_limit_5g[regd][bw][rs][ch_idx] = pwr_limit;
1349 ww = hal->tx_pwr_limit_5g[RTW_REGD_WW][bw][rs][ch_idx];
1351 hal->tx_pwr_limit_5g[RTW_REGD_WW][bw][rs][ch_idx] = ww;
1358 u8 bw, u8 ch_idx, u8 rs_ht, u8 rs_vht)
1362 s8 lmt_ht = hal->tx_pwr_limit_5g[regd][bw][rs_ht][ch_idx];
1363 s8 lmt_vht = hal->tx_pwr_limit_5g[regd][bw][rs_vht][ch_idx];
1369 hal->tx_pwr_limit_5g[regd][bw][rs_ht][ch_idx] = lmt_vht;
1372 hal->tx_pwr_limit_5g[regd][bw][rs_vht][ch_idx] = lmt_ht;
1377 rtw_xref_txpwr_lmt_by_rs(struct rtw_dev *rtwdev, u8 regd, u8 bw, u8 ch_idx)
1387 rtw_xref_5g_txpwr_lmt(rtwdev, regd, bw, ch_idx, rs_ht, rs_vht);
1393 rtw_xref_5g_txpwr_lmt_by_ch(struct rtw_dev *rtwdev, u8 regd, u8 bw)
1398 rtw_xref_txpwr_lmt_by_rs(rtwdev, regd, bw, ch_idx);
1405 u8 bw;
1407 for (bw = RTW_CHANNEL_WIDTH_20; bw <= RTW_CHANNEL_WIDTH_40; bw++)
1408 rtw_xref_5g_txpwr_lmt_by_ch(rtwdev, regd, bw);
1428 p->bw, p->rs, p->ch, p->txpwr_lmt);
1744 enum rtw_bandwidth bw, u8 rf_path,
1775 bw = RTW_CHANNEL_WIDTH_20;
1779 bw = min_t(u8, bw, RTW_CHANNEL_WIDTH_40);
1782 for (cur_bw = RTW_CHANNEL_WIDTH_20; cur_bw <= bw; cur_bw++) {
1799 WARN(1, "invalid arguments, band=%d, bw=%d, path=%d, rate=%d, ch=%d\n",
1800 band, bw, rf_path, rate, channel);
1804 void rtw_get_tx_power_params(struct rtw_dev *rtwdev, u8 path, u8 rate, u8 bw,
1824 bw, rate, group);
1830 bw, rate, group);
1834 *limit = rtw_phy_get_tx_power_limit(rtwdev, band, bw, path,
1875 u8 bw;
1883 bw = hal->current_band_width;
1887 bw, ch, regd);
1979 __rtw_phy_tx_power_limit_config(struct rtw_hal *hal, u8 regd, u8 bw, u8 rs)
1986 hal->tx_pwr_limit_2g[regd][bw][rs][ch] -= base;
1991 hal->tx_pwr_limit_5g[regd][bw][rs][ch] -= base;
1997 u8 regd, bw, rs;
2003 for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++)
2005 __rtw_phy_tx_power_limit_config(hal, regd, bw, rs);
2009 u8 regd, u8 bw, u8 rs)
2017 hal->tx_pwr_limit_2g[regd][bw][rs][ch] = max_power_index;
2021 hal->tx_pwr_limit_5g[regd][bw][rs][ch] = max_power_index;
2027 u8 regd, path, rate, rs, bw;
2039 for (bw = 0; bw < RTW_CHANNEL_WIDTH_MAX; bw++)
2041 rtw_phy_init_tx_power_limit(rtwdev, regd, bw,