Lines Matching defs:efuse
14 #include "efuse.h"
700 WARN(1, "invalid hw configuration from efuse\n");
897 struct rtw_efuse *efuse = &rtwdev->efuse;
926 if (efuse->hw_cap.nss == 1)
1077 wifi_only = !rtwdev->efuse.btcoex;
1142 struct rtw_efuse *efuse = &rtwdev->efuse;
1153 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
1160 if (efuse->hw_cap.nss > 1) {
1176 struct rtw_efuse *efuse = &rtwdev->efuse;
1180 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
1181 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
1208 if (efuse->hw_cap.nss > 1) {
1353 struct rtw_efuse *efuse = &rtwdev->efuse;
1383 efuse->physical_size = chip->phy_efuse_size;
1384 efuse->logical_size = chip->log_efuse_size;
1385 efuse->protect_size = chip->ptct_efuse_size;
1438 struct rtw_efuse *efuse = &rtwdev->efuse;
1456 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
1457 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
1458 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
1459 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
1460 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
1462 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
1464 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE ||
1465 efuse->hw_cap.nss > rtwdev->hal.rf_path_num)
1466 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
1470 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
1471 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
1484 struct rtw_efuse *efuse = &rtwdev->efuse;
1489 /* power on mac to read efuse */
1506 if (efuse->crystal_cap == 0xff)
1507 efuse->crystal_cap = 0;
1508 if (efuse->pa_type_2g == 0xff)
1509 efuse->pa_type_2g = 0;
1510 if (efuse->pa_type_5g == 0xff)
1511 efuse->pa_type_5g = 0;
1512 if (efuse->lna_type_2g == 0xff)
1513 efuse->lna_type_2g = 0;
1514 if (efuse->lna_type_5g == 0xff)
1515 efuse->lna_type_5g = 0;
1516 if (efuse->channel_plan == 0xff)
1517 efuse->channel_plan = 0x7f;
1518 if (efuse->rf_board_option == 0xff)
1519 efuse->rf_board_option = 0;
1520 if (efuse->bt_setting & BIT(0))
1521 efuse->share_ant = true;
1522 if (efuse->regd == 0xff)
1523 efuse->regd = 0;
1524 if (efuse->tx_bb_swing_setting_2g == 0xff)
1525 efuse->tx_bb_swing_setting_2g = 0;
1526 if (efuse->tx_bb_swing_setting_5g == 0xff)
1527 efuse->tx_bb_swing_setting_5g = 0;
1529 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
1530 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
1531 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
1532 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
1533 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
1574 rtw_err(rtwdev, "failed to setup chip efuse info\n");
1756 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);