Lines Matching refs:value
246 #define SET_PKT_H2C_CATEGORY(h2c_pkt, value) \
247 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(6, 0))
248 #define SET_PKT_H2C_CMD_ID(h2c_pkt, value) \
249 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
250 #define SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, value) \
251 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 16))
252 #define SET_PKT_H2C_TOTAL_LEN(h2c_pkt, value) \
253 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 0))
262 #define FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, value) \
263 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 16))
264 #define GENERAL_INFO_SET_FW_TX_BOUNDARY(h2c_pkt, value) \
265 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
267 #define PHYDM_INFO_SET_REF_TYPE(h2c_pkt, value) \
268 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(7, 0))
269 #define PHYDM_INFO_SET_RF_TYPE(h2c_pkt, value) \
270 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8))
271 #define PHYDM_INFO_SET_CUT_VER(h2c_pkt, value) \
272 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
273 #define PHYDM_INFO_SET_RX_ANT_STATUS(h2c_pkt, value) \
274 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24))
275 #define PHYDM_INFO_SET_TX_ANT_STATUS(h2c_pkt, value) \
276 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 28))
277 #define IQK_SET_CLEAR(h2c_pkt, value) \
278 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0))
279 #define IQK_SET_SEGMENT_IQK(h2c_pkt, value) \
280 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1))
282 #define CHSW_INFO_SET_CH(pkt, value) \
283 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(7, 0))
284 #define CHSW_INFO_SET_PRI_CH_IDX(pkt, value) \
285 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(11, 8))
286 #define CHSW_INFO_SET_BW(pkt, value) \
287 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(15, 12))
288 #define CHSW_INFO_SET_TIMEOUT(pkt, value) \
289 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(23, 16))
290 #define CHSW_INFO_SET_ACTION_ID(pkt, value) \
291 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(30, 24))
293 #define UPDATE_PKT_SET_SIZE(h2c_pkt, value) \
294 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 0))
295 #define UPDATE_PKT_SET_PKT_ID(h2c_pkt, value) \
296 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
297 #define UPDATE_PKT_SET_LOCATION(h2c_pkt, value) \
298 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 24))
300 #define CH_SWITCH_SET_START(h2c_pkt, value) \
301 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0))
302 #define CH_SWITCH_SET_DEST_CH_EN(h2c_pkt, value) \
303 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1))
304 #define CH_SWITCH_SET_ABSOLUTE_TIME(h2c_pkt, value) \
305 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(2))
306 #define CH_SWITCH_SET_PERIODIC_OPT(h2c_pkt, value) \
307 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(4, 3))
308 #define CH_SWITCH_SET_INFO_LOC(h2c_pkt, value) \
309 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8))
310 #define CH_SWITCH_SET_CH_NUM(h2c_pkt, value) \
311 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16))
312 #define CH_SWITCH_SET_PRI_CH_IDX(h2c_pkt, value) \
313 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24))
314 #define CH_SWITCH_SET_DEST_CH(h2c_pkt, value) \
315 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(7, 0))
316 #define CH_SWITCH_SET_NORMAL_PERIOD(h2c_pkt, value) \
317 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(13, 8))
318 #define CH_SWITCH_SET_NORMAL_PERIOD_SEL(h2c_pkt, value) \
319 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(15, 14))
320 #define CH_SWITCH_SET_SLOW_PERIOD(h2c_pkt, value) \
321 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(21, 16))
322 #define CH_SWITCH_SET_SLOW_PERIOD_SEL(h2c_pkt, value) \
323 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(23, 22))
324 #define CH_SWITCH_SET_NORMAL_CYCLE(h2c_pkt, value) \
325 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(31, 24))
326 #define CH_SWITCH_SET_TSF_HIGH(h2c_pkt, value) \
327 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x04, value, GENMASK(31, 0))
328 #define CH_SWITCH_SET_TSF_LOW(h2c_pkt, value) \
329 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x05, value, GENMASK(31, 0))
330 #define CH_SWITCH_SET_INFO_SIZE(h2c_pkt, value) \
331 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x06, value, GENMASK(15, 0))
356 #define SET_H2C_CMD_ID_CLASS(h2c_pkt, value) \
357 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(7, 0))
359 #define MEDIA_STATUS_RPT_SET_OP_MODE(h2c_pkt, value) \
360 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
361 #define MEDIA_STATUS_RPT_SET_MACID(h2c_pkt, value) \
362 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
364 #define SET_PWR_MODE_SET_MODE(h2c_pkt, value) \
365 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(14, 8))
366 #define SET_PWR_MODE_SET_RLBM(h2c_pkt, value) \
367 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(19, 16))
368 #define SET_PWR_MODE_SET_SMART_PS(h2c_pkt, value) \
369 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 20))
370 #define SET_PWR_MODE_SET_AWAKE_INTERVAL(h2c_pkt, value) \
371 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
372 #define SET_PWR_MODE_SET_PORT_ID(h2c_pkt, value) \
373 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 5))
374 #define SET_PWR_MODE_SET_PWR_STATE(h2c_pkt, value) \
375 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
376 #define LPS_PG_INFO_LOC(h2c_pkt, value) \
377 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
378 #define LPS_PG_DPK_LOC(h2c_pkt, value) \
379 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
380 #define LPS_PG_SEC_CAM_EN(h2c_pkt, value) \
381 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
382 #define LPS_PG_PATTERN_CAM_EN(h2c_pkt, value) \
383 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
384 #define SET_RSSI_INFO_MACID(h2c_pkt, value) \
385 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
386 #define SET_RSSI_INFO_RSSI(h2c_pkt, value) \
387 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
388 #define SET_RSSI_INFO_STBC(h2c_pkt, value) \
389 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, BIT(1))
390 #define SET_RA_INFO_MACID(h2c_pkt, value) \
391 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
392 #define SET_RA_INFO_RATE_ID(h2c_pkt, value) \
393 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(20, 16))
394 #define SET_RA_INFO_INIT_RA_LVL(h2c_pkt, value) \
395 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(22, 21))
396 #define SET_RA_INFO_SGI_EN(h2c_pkt, value) \
397 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(23))
398 #define SET_RA_INFO_BW_MODE(h2c_pkt, value) \
399 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(25, 24))
400 #define SET_RA_INFO_LDPC(h2c_pkt, value) \
401 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(26))
402 #define SET_RA_INFO_NO_UPDATE(h2c_pkt, value) \
403 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(27))
404 #define SET_RA_INFO_VHT_EN(h2c_pkt, value) \
405 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(29, 28))
406 #define SET_RA_INFO_DIS_PT(h2c_pkt, value) \
407 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(30))
408 #define SET_RA_INFO_RA_MASK0(h2c_pkt, value) \
409 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
410 #define SET_RA_INFO_RA_MASK1(h2c_pkt, value) \
411 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
412 #define SET_RA_INFO_RA_MASK2(h2c_pkt, value) \
413 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16))
414 #define SET_RA_INFO_RA_MASK3(h2c_pkt, value) \
415 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 24))
416 #define SET_QUERY_BT_INFO(h2c_pkt, value) \
417 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
418 #define SET_WL_CH_INFO_LINK(h2c_pkt, value) \
419 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
420 #define SET_WL_CH_INFO_CHNL(h2c_pkt, value) \
421 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
422 #define SET_WL_CH_INFO_BW(h2c_pkt, value) \
423 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
424 #define SET_BT_MP_INFO_SEQ(h2c_pkt, value) \
425 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 12))
426 #define SET_BT_MP_INFO_OP_CODE(h2c_pkt, value) \
427 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
428 #define SET_BT_MP_INFO_PARA1(h2c_pkt, value) \
429 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
430 #define SET_BT_MP_INFO_PARA2(h2c_pkt, value) \
431 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
432 #define SET_BT_MP_INFO_PARA3(h2c_pkt, value) \
433 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
434 #define SET_BT_TX_POWER_INDEX(h2c_pkt, value) \
435 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
436 #define SET_IGNORE_WLAN_ACTION_EN(h2c_pkt, value) \
437 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
438 #define SET_COEX_TDMA_TYPE_PARA1(h2c_pkt, value) \
439 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
440 #define SET_COEX_TDMA_TYPE_PARA2(h2c_pkt, value) \
441 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
442 #define SET_COEX_TDMA_TYPE_PARA3(h2c_pkt, value) \
443 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
444 #define SET_COEX_TDMA_TYPE_PARA4(h2c_pkt, value) \
445 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
446 #define SET_COEX_TDMA_TYPE_PARA5(h2c_pkt, value) \
447 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
448 #define SET_BT_WIFI_CONTROL_OP_CODE(h2c_pkt, value) \
449 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
450 #define SET_BT_WIFI_CONTROL_DATA1(h2c_pkt, value) \
451 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
452 #define SET_BT_WIFI_CONTROL_DATA2(h2c_pkt, value) \
453 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
454 #define SET_BT_WIFI_CONTROL_DATA3(h2c_pkt, value) \
455 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0))
456 #define SET_BT_WIFI_CONTROL_DATA4(h2c_pkt, value) \
457 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8))
458 #define SET_BT_WIFI_CONTROL_DATA5(h2c_pkt, value) \
459 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16))
461 #define SET_KEEP_ALIVE_ENABLE(h2c_pkt, value) \
462 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
463 #define SET_KEEP_ALIVE_ADOPT(h2c_pkt, value) \
464 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
465 #define SET_KEEP_ALIVE_PKT_TYPE(h2c_pkt, value) \
466 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
467 #define SET_KEEP_ALIVE_CHECK_PERIOD(h2c_pkt, value) \
468 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
470 #define SET_DISCONNECT_DECISION_ENABLE(h2c_pkt, value) \
471 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
472 #define SET_DISCONNECT_DECISION_ADOPT(h2c_pkt, value) \
473 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
474 #define SET_DISCONNECT_DECISION_CHECK_PERIOD(h2c_pkt, value) \
475 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
476 #define SET_DISCONNECT_DECISION_TRY_PKT_NUM(h2c_pkt, value) \
477 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24))
479 #define SET_WOWLAN_FUNC_ENABLE(h2c_pkt, value) \
480 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
481 #define SET_WOWLAN_PATTERN_MATCH_ENABLE(h2c_pkt, value) \
482 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
483 #define SET_WOWLAN_MAGIC_PKT_ENABLE(h2c_pkt, value) \
484 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
485 #define SET_WOWLAN_UNICAST_PKT_ENABLE(h2c_pkt, value) \
486 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(11))
487 #define SET_WOWLAN_REKEY_WAKEUP_ENABLE(h2c_pkt, value) \
488 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(14))
489 #define SET_WOWLAN_DEAUTH_WAKEUP_ENABLE(h2c_pkt, value) \
490 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(15))
492 #define SET_REMOTE_WAKECTRL_ENABLE(h2c_pkt, value) \
493 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
494 #define SET_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(h2c_pkt, value) \
495 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(12))
497 #define SET_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(h2c_pkt, value) \
498 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8))
499 #define SET_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(h2c_pkt, value) \
500 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))
502 #define SET_NLO_FUN_EN(h2c_pkt, value) \
503 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8))
504 #define SET_NLO_PS_32K(h2c_pkt, value) \
505 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9))
506 #define SET_NLO_IGNORE_SECURITY(h2c_pkt, value) \
507 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10))
508 #define SET_NLO_LOC_NLO_INFO(h2c_pkt, value) \
509 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16))