Lines Matching defs:queue
1041 static void rt61pci_start_queue(struct data_queue *queue)
1043 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
1046 switch (queue->qid) {
1064 static void rt61pci_kick_queue(struct data_queue *queue)
1066 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
1069 switch (queue->qid) {
1095 static void rt61pci_stop_queue(struct data_queue *queue)
1097 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
1100 switch (queue->qid) {
1292 if (entry->queue->qid == QID_RX) {
1310 if (entry->queue->qid == QID_RX) {
1787 rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, entry->queue->qid);
1788 rt2x00_set_field32(&word, TXD_W1_AIFSN, entry->queue->aifs);
1789 rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
1790 rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
1812 rt2x00_set_field32(&word, TXD_W5_PID_TYPE, entry->queue->qid);
1815 TXPOWER_TO_DEV(entry->queue->rt2x00dev->tx_power));
1819 if (entry->queue->qid != QID_BEACON) {
1865 skbdesc->desc_len = (entry->queue->qid == QID_BEACON) ? TXINFO_SIZE :
1875 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1939 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1997 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
2061 struct data_queue *queue;
2088 * queue identication number.
2091 queue = rt2x00queue_get_tx_queue(rt2x00dev, type);
2092 if (unlikely(!queue))
2100 if (unlikely(index >= queue->limit))
2103 entry = &queue->entries[index];
2111 entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE);
2120 entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE);
2806 struct data_queue *queue;
2814 * update the queue settings and validate the input. After that
2816 * in the queue parameter.
2829 queue = rt2x00queue_get_tx_queue(rt2x00dev, queue_idx);
2837 rt2x00_set_field32(®, field, queue->txop);
2845 rt2x00_set_field32(®, field, queue->aifs);
2849 rt2x00_set_field32(®, field, queue->cw_min);
2853 rt2x00_set_field32(®, field, queue->cw_max);
2932 static void rt61pci_queue_init(struct data_queue *queue)
2934 switch (queue->qid) {
2936 queue->limit = 32;
2937 queue->data_size = DATA_FRAME_SIZE;
2938 queue->desc_size = RXD_DESC_SIZE;
2939 queue->priv_size = sizeof(struct queue_entry_priv_mmio);
2946 queue->limit = 32;
2947 queue->data_size = DATA_FRAME_SIZE;
2948 queue->desc_size = TXD_DESC_SIZE;
2949 queue->priv_size = sizeof(struct queue_entry_priv_mmio);
2953 queue->limit = 4;
2954 queue->data_size = 0; /* No DMA required for beacons */
2955 queue->desc_size = TXINFO_SIZE;
2956 queue->priv_size = sizeof(struct queue_entry_priv_mmio);