Lines Matching defs:queue
27 unsigned int rt2800mmio_get_dma_done(struct data_queue *queue)
29 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
33 switch (queue->qid) {
38 qid = queue->qid;
45 entry = rt2x00queue_get_entry(queue, Q_INDEX_DMA_DONE);
74 const unsigned int txwi_size = entry->queue->winfo_size;
424 void rt2800mmio_start_queue(struct data_queue *queue)
426 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
429 switch (queue->qid) {
455 void rt2800mmio_kick_queue(struct data_queue *queue)
457 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
460 switch (queue->qid) {
465 WARN_ON_ONCE(rt2x00queue_empty(queue));
466 entry = rt2x00queue_get_entry(queue, Q_INDEX);
467 rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(queue->qid),
473 entry = rt2x00queue_get_entry(queue, Q_INDEX);
483 void rt2800mmio_flush_queue(struct data_queue *queue, bool drop)
485 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
489 switch (queue->qid) {
508 if (rt2x00queue_empty(queue))
527 void rt2800mmio_stop_queue(struct data_queue *queue)
529 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
532 switch (queue->qid) {
564 void rt2800mmio_queue_init(struct data_queue *queue)
566 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
571 switch (queue->qid) {
573 queue->limit = 128;
574 queue->data_size = AGGREGATION_SIZE;
575 queue->desc_size = RXD_DESC_SIZE;
576 queue->winfo_size = rxwi_size;
577 queue->priv_size = sizeof(struct queue_entry_priv_mmio);
584 queue->limit = 64;
585 queue->data_size = AGGREGATION_SIZE;
586 queue->desc_size = TXD_DESC_SIZE;
587 queue->winfo_size = txwi_size;
588 queue->priv_size = sizeof(struct queue_entry_priv_mmio);
592 queue->limit = 8;
593 queue->data_size = 0; /* No DMA required for beacons */
594 queue->desc_size = TXD_DESC_SIZE;
595 queue->winfo_size = txwi_size;
596 queue->priv_size = sizeof(struct queue_entry_priv_mmio);
615 if (entry->queue->qid == QID_RX) {
631 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
634 if (entry->queue->qid == QID_RX) {
655 if (entry->queue->length == 1)