Lines Matching refs:status
124 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
232 /* power management status cookie from firmware */
990 mwl8k_rxd_ap_process(void *_rxd, struct ieee80211_rx_status *status,
999 memset(status, 0, sizeof(*status));
1001 status->signal = -rxd->rssi;
1005 status->encoding = RX_ENC_HT;
1007 status->bw = RATE_INFO_BW_40;
1008 status->rate_idx = MWL8K_AP_RATE_INFO_RATEID(rxd->rate);
1014 status->rate_idx = i;
1021 status->band = NL80211_BAND_5GHZ;
1022 if (!(status->encoding == RX_ENC_HT) &&
1023 status->rate_idx >= MWL8K_LEGACY_5G_RATE_OFFSET)
1024 status->rate_idx -= MWL8K_LEGACY_5G_RATE_OFFSET;
1026 status->band = NL80211_BAND_2GHZ;
1028 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1029 status->band);
1036 status->flag |= RX_FLAG_MMIC_ERROR;
1101 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
1113 memset(status, 0, sizeof(*status));
1115 status->signal = -rxd->rssi;
1117 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
1118 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
1121 status->enc_flags |= RX_ENC_FLAG_SHORTPRE;
1123 status->bw = RATE_INFO_BW_40;
1125 status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1127 status->encoding = RX_ENC_HT;
1130 status->band = NL80211_BAND_5GHZ;
1131 if (!(status->encoding == RX_ENC_HT) &&
1132 status->rate_idx >= MWL8K_LEGACY_5G_RATE_OFFSET)
1133 status->rate_idx -= MWL8K_LEGACY_5G_RATE_OFFSET;
1135 status->band = NL80211_BAND_2GHZ;
1137 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1138 status->band);
1143 status->flag |= RX_FLAG_MMIC_ERROR;
1329 struct ieee80211_rx_status status;
1339 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1370 * this bss. If yes, set the status flags
1391 if (status.flag & RX_FLAG_MMIC_ERROR) {
1399 status.flag |= RX_FLAG_IV_STRIPPED |
1407 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1434 __le32 status;
1483 tx_desc->status = 0;
1514 u32 status;
1516 status = le32_to_cpu(tx_desc->status);
1517 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1632 #define MWL8K_TXD_SUCCESS(status) \
1633 ((status) & (MWL8K_TXD_STATUS_OK | \
1682 u32 status;
1691 status = le32_to_cpu(tx_desc->status);
1693 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1696 tx_desc->status &=
1750 info->status.rates[0].idx = -1;
1751 info->status.rates[0].count = 1;
1753 if (MWL8K_TXD_SUCCESS(status))
2110 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
3823 u32 status = 0;
3852 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3853 iowrite32((status | MWL8K_A2H_INT_BA_WATCHDOG),
4592 u32 status;
4594 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4595 if (!status)
4598 if (status & MWL8K_A2H_INT_TX_DONE) {
4599 status &= ~MWL8K_A2H_INT_TX_DONE;
4603 if (status & MWL8K_A2H_INT_RX_READY) {
4604 status &= ~MWL8K_A2H_INT_RX_READY;
4608 if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
4613 status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
4617 if (status)
4618 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4620 if (status & MWL8K_A2H_INT_OPC_DONE) {
4625 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {