Lines Matching refs:port
678 u8 *buffer, u32 pkt_len, u32 port)
683 (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE : BLOCK_MODE;
689 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK);
709 u32 len, u32 port, u8 claim)
713 u8 blk_mode = (port & MWIFIEX_SDIO_BYTE_MODE_MASK) ? BYTE_MODE
718 u32 ioport = (port & MWIFIEX_SDIO_IO_PORT_MASK);
1011 /* Configure cmd port and enable reading rx length from the register */
1018 /* Enable Dnld/Upld ready auto reset for cmd port after cmd53 is
1050 /* Read the IO port */
1067 "info: SDIO FUNC1 IO port: %#x\n", adapter->ioport);
1090 u8 *payload, u32 pkt_len, u32 port)
1096 ret = mwifiex_write_data_sync(adapter, payload, pkt_len, port);
1116 * This function gets the read port.
1118 * If control port bit is set in MP read bitmap, the control port
1119 * is returned, otherwise the current read port is returned and
1123 static int mwifiex_get_rd_port(struct mwifiex_adapter *adapter, u8 *port)
1143 *port = CTRL_PORT;
1145 "data: port=%d mp_rd_bitmap=0x%08x\n",
1146 *port, card->mp_rd_bitmap);
1155 *port = card->curr_rd_port;
1161 "data: port=%d mp_rd_bitmap=0x%08x -> 0x%08x\n",
1162 *port, rd_bitmap, card->mp_rd_bitmap);
1168 * This function gets the write port for data.
1170 * The current write port is returned if available and the value is
1174 static int mwifiex_get_wr_port_data(struct mwifiex_adapter *adapter, u32 *port)
1190 *port = card->curr_wr_port;
1198 if ((card->has_control_mask) && (*port == CTRL_PORT)) {
1200 "invalid data port=%d cur port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n",
1201 *port, card->curr_wr_port, wr_bitmap,
1207 "data: port=%d mp_wr_bitmap=0x%08x -> 0x%08x\n",
1208 *port, wr_bitmap, card->mp_wr_bitmap);
1275 * For SDIO new mode CMD port interrupts
1697 * For data received on control port, or if aggregation is disabled, the
1703 u16 rx_len, u8 port)
1715 if ((card->has_control_mask) && (port == CTRL_PORT)) {
1776 mp_rx_aggr_setup(card, rx_len, port);
1871 mwifiex_dbg(adapter, INFO, "info: RX: port: %d, rx_len: %d\n",
1872 port, rx_len);
1878 "drop pkt port=%d len=%d\n", port, rx_len);
1881 adapter->ioport + port))
1890 adapter->ioport + port))
1907 mp_rx_aggr_setup(card, rx_len, port);
1931 * port updated is command port only, command sent interrupt checking
1944 u8 port = CTRL_PORT;
1997 "%s:Received wrong packet on cmd port",
2025 /* As firmware will not generate download ready interrupt if the port
2026 updated is command port only, cmd_sent should be done for any SDIO
2029 /* Check if firmware has attach buffer at command port and
2054 ret = mwifiex_get_rd_port(adapter, &port);
2060 len_reg_l = reg->rd_len_p0_l + (port << 1);
2061 len_reg_u = reg->rd_len_p0_u + (port << 1);
2065 "info: RX: port=%d rx_len=%u\n",
2066 port, rx_len);
2085 port)) {
2135 u8 *payload, u32 pkt_len, u32 port,
2148 (card->has_control_mask && (port == CTRL_PORT)) ||
2149 (card->supports_sdio_new_mode && (port == CMD_PORT_SLCT))) {
2214 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port);
2253 /* Save the last multi port tx aggreagation info to debug log */
2269 __func__, port);
2271 adapter->ioport + port);
2278 MP_TX_AGGR_BUF_PUT(card, payload, pkt_len, port);
2302 u32 port = CTRL_PORT;
2320 ret = mwifiex_get_wr_port_data(adapter, &port);
2338 port = CMD_PORT_SLCT;
2346 port, tx_param->next_pkt_len
2350 port, 0);
2358 card->curr_wr_port = port;
2478 * - Get SDIO port
2553 /* Disable rx single port aggregation */
2560 /* Disable multi port aggregation */
2604 * This function updates the MP end port in card.
2607 mwifiex_update_mp_end_port(struct mwifiex_adapter *adapter, u16 port)
2613 card->mp_end_port = port;
2626 "cmd: mp_end_port %d, data port mask 0x%x\n",
2627 port, card->mp_data_port_mask);