Lines Matching defs:il
34 il4965_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
47 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL4965_RTC_INST_LOWER_BOUND);
48 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
65 il4965_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
74 il_wr(il, HBUS_TARG_MEM_RADDR, IL4965_RTC_INST_LOWER_BOUND);
81 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
104 il4965_verify_ucode(struct il_priv *il)
111 image = (__le32 *) il->ucode_boot.v_addr;
112 len = il->ucode_boot.len;
113 ret = il4965_verify_inst_sparse(il, image, len);
120 image = (__le32 *) il->ucode_init.v_addr;
121 len = il->ucode_init.len;
122 ret = il4965_verify_inst_sparse(il, image, len);
129 image = (__le32 *) il->ucode_code.v_addr;
130 len = il->ucode_code.len;
131 ret = il4965_verify_inst_sparse(il, image, len);
142 image = (__le32 *) il->ucode_boot.v_addr;
143 len = il->ucode_boot.len;
144 ret = il4965_verify_inst_full(il, image, len);
162 il4965_eeprom_acquire_semaphore(struct il_priv *il)
169 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
174 _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
186 il4965_eeprom_release_semaphore(struct il_priv *il)
188 il_clear_bit(il, CSR_HW_IF_CONFIG_REG,
194 il4965_eeprom_check_version(struct il_priv *il)
199 eeprom_ver = il_eeprom_query16(il, EEPROM_VERSION);
200 calib_ver = il_eeprom_query16(il, EEPROM_4965_CALIB_VERSION_OFFSET);
202 if (eeprom_ver < il->cfg->eeprom_ver ||
203 calib_ver < il->cfg->eeprom_calib_ver)
211 "CALIB=0x%x < 0x%x\n", eeprom_ver, il->cfg->eeprom_ver,
212 calib_ver, il->cfg->eeprom_calib_ver);
218 il4965_eeprom_get_mac(const struct il_priv *il, u8 * mac)
220 const u8 *addr = il_eeprom_query_addr(il,
227 il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd)
238 reg = _il_rd(il, CSR_LED_REG);
240 _il_wr(il, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
242 return il_send_cmd(il, &cmd);
247 il4965_led_enable(struct il_priv *il)
249 _il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
252 static int il4965_send_tx_power(struct il_priv *il);
253 static int il4965_hw_get_temperature(struct il_priv *il);
267 il4965_verify_bsm(struct il_priv *il)
269 __le32 *image = il->ucode_boot.v_addr;
270 u32 len = il->ucode_boot.len;
277 val = il_rd_prph(il, BSM_WR_DWCOUNT_REG);
280 val = il_rd_prph(il, reg);
328 il4965_load_bsm(struct il_priv *il)
330 __le32 *image = il->ucode_boot.v_addr;
331 u32 len = il->ucode_boot.len;
343 il->ucode_type = UCODE_RT;
355 pinst = il->ucode_init.p_addr >> 4;
356 pdata = il->ucode_init_data.p_addr >> 4;
357 inst_len = il->ucode_init.len;
358 data_len = il->ucode_init_data.len;
360 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
361 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
362 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
363 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
369 _il_wr_prph(il, reg_offset, le32_to_cpu(*image));
371 ret = il4965_verify_bsm(il);
376 il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
377 il_wr_prph(il, BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND);
378 il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
382 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
386 done = il_rd_prph(il, BSM_WR_CTRL_REG);
400 il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
415 il4965_set_ucode_ptrs(struct il_priv *il)
421 pinst = il->ucode_code.p_addr >> 4;
422 pdata = il->ucode_data_backup.p_addr >> 4;
425 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
426 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
427 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
431 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
432 il->ucode_code.len | BSM_DRAM_INST_LOAD);
444 * Voltage, temperature, and MIMO tx gain correction, now stored in il
450 il4965_init_alive_start(struct il_priv *il)
455 if (il4965_verify_ucode(il)) {
463 il->temperature = il4965_hw_get_temperature(il);
469 if (il4965_set_ucode_ptrs(il)) {
478 queue_work(il->workqueue, &il->restart);
492 il4965_nic_config(struct il_priv *il)
497 spin_lock_irqsave(&il->lock, flags);
499 radio_cfg = il_eeprom_query16(il, EEPROM_RADIO_CONFIG);
503 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
509 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
513 il->calib_info =
515 il_eeprom_query_addr(il, EEPROM_4965_CALIB_TXPOWER_OFFSET);
517 spin_unlock_irqrestore(&il->lock, flags);
524 il4965_chain_noise_reset(struct il_priv *il)
526 struct il_chain_noise_data *data = &(il->chain_noise_data);
528 if (data->state == IL_CHAIN_NOISE_ALIVE && il_is_any_associated(il)) {
545 if (il_send_cmd_pdu(il, C_PHY_CALIBRATION, sizeof(cmd), &cmd))
628 il4965_get_sub_band(const struct il_priv *il, u32 channel)
633 if (il->calib_info->band_info[b].ch_from == 0)
636 if (channel >= il->calib_info->band_info[b].ch_from &&
637 channel <= il->calib_info->band_info[b].ch_to)
666 il4965_interpolate_chan(struct il_priv *il, u32 channel,
678 s = il4965_get_sub_band(il, channel);
684 ch_i1 = il->calib_info->band_info[s].ch1.ch_num;
685 ch_i2 = il->calib_info->band_info[s].ch2.ch_num;
693 m1 = &(il->calib_info->band_info[s].ch1.
695 m2 = &(il->calib_info->band_info[s].ch2.
1003 il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel, u8 is_ht40,
1033 user_target_power = 2 * il->tx_power_user_lmt;
1038 ch_info = il_get_channel_info(il, il->band, channel);
1064 saturation_power = il->calib_info->saturation_power24;
1066 saturation_power = il->calib_info->saturation_power52;
1093 il4965_interpolate_chan(il, channel, &ch_eeprom_info);
1096 voltage = le16_to_cpu(il->calib_info->voltage);
1097 init_voltage = (s32) le32_to_cpu(il->card_alive_init.voltage);
1105 current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN);
1106 current_temp = min(il->temperature, IL_TX_POWER_TEMPERATURE_MAX);
1178 (s32) le32_to_cpu(il->card_alive_init.
1238 * The power limit is taken from il->tx_power_user_lmt.
1241 il4965_send_tx_power(struct il_priv *il)
1250 (test_bit(S_SCAN_HW, &il->status),
1254 band = il->band == NL80211_BAND_2GHZ;
1256 is_ht40 = iw4965_is_ht40_channel(il->active.flags);
1258 if (is_ht40 && (il->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1262 cmd.channel = il->active.channel;
1265 il4965_fill_txpower_tbl(il, band, le16_to_cpu(il->active.channel),
1270 ret = il_send_cmd_pdu(il, C_TX_PWR_TBL, sizeof(cmd), &cmd);
1277 il4965_send_rxon_assoc(struct il_priv *il)
1281 const struct il_rxon_cmd *rxon1 = &il->staging;
1282 const struct il_rxon_cmd *rxon2 = &il->active;
1284 lockdep_assert_held(&il->mutex);
1299 rxon_assoc.flags = il->staging.flags;
1300 rxon_assoc.filter_flags = il->staging.filter_flags;
1301 rxon_assoc.ofdm_basic_rates = il->staging.ofdm_basic_rates;
1302 rxon_assoc.cck_basic_rates = il->staging.cck_basic_rates;
1305 il->staging.ofdm_ht_single_stream_basic_rates;
1307 il->staging.ofdm_ht_dual_stream_basic_rates;
1308 rxon_assoc.rx_chain_select_flags = il->staging.rx_chain;
1311 il_send_cmd_pdu_async(il, C_RXON_ASSOC, sizeof(rxon_assoc),
1318 il4965_commit_rxon(struct il_priv *il)
1321 struct il_rxon_cmd *active_rxon = (void *)&il->active;
1323 bool new_assoc = !!(il->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
1325 if (!il_is_alive(il))
1329 il->staging.flags |= RXON_FLG_TSF2HOST_MSK;
1331 ret = il_check_rxon_cmd(il);
1341 if (test_bit(S_CHANNEL_SWITCH_PENDING, &il->status) &&
1342 il->switch_channel != il->staging.channel) {
1344 le16_to_cpu(il->switch_channel));
1345 il_chswitch_done(il, false);
1351 if (!il_full_rxon_required(il)) {
1352 ret = il_send_rxon_assoc(il);
1358 memcpy(active_rxon, &il->staging, sizeof(*active_rxon));
1359 il_print_rx_config_cmd(il);
1364 il_set_tx_power(il, il->tx_power_next, false);
1372 if (il_is_associated(il) && new_assoc) {
1377 il_send_cmd_pdu(il, C_RXON,
1387 il_clear_ucode_stations(il);
1388 il_restore_stations(il);
1389 ret = il4965_restore_default_wep_keys(il);
1398 le16_to_cpu(il->staging.channel), il->staging.bssid_addr);
1400 il_set_rxon_hwcrypto(il, !il->cfg->mod_params->sw_crypto);
1408 il_send_cmd_pdu(il, C_RXON,
1409 sizeof(struct il_rxon_cmd), &il->staging);
1415 memcpy(active_rxon, &il->staging, sizeof(*active_rxon));
1416 il_clear_ucode_stations(il);
1417 il_restore_stations(il);
1418 ret = il4965_restore_default_wep_keys(il);
1425 il->start_calib = 0;
1430 il_send_cmd_pdu(il, C_RXON,
1431 sizeof(struct il_rxon_cmd), &il->staging);
1436 memcpy(active_rxon, &il->staging, sizeof(*active_rxon));
1438 il_print_rx_config_cmd(il);
1440 il4965_init_sensitivity(il);
1444 ret = il_set_tx_power(il, il->tx_power_next, true);
1454 il4965_hw_channel_switch(struct il_priv *il,
1467 u16 beacon_interval = le16_to_cpu(il->timing.beacon_interval);
1468 struct ieee80211_vif *vif = il->vif;
1469 band = (il->band == NL80211_BAND_2GHZ);
1474 is_ht40 = iw4965_is_ht40_channel(il->staging.flags);
1476 if (is_ht40 && (il->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1483 cmd.rxon_flags = il->staging.flags;
1484 cmd.rxon_filter_flags = il->staging.filter_flags;
1491 if (il->ucode_beacon_time > tsf_low && beacon_interval) {
1493 ((il->ucode_beacon_time - tsf_low) / beacon_interval)) {
1495 (il->ucode_beacon_time - tsf_low) / beacon_interval;
1500 cmd.switch_time = cpu_to_le32(il->ucode_beacon_time);
1505 il_usecs_to_beacons(il, switch_time_in_usec,
1508 il_add_beacon_time(il, il->ucode_beacon_time,
1512 ch_info = il_get_channel_info(il, il->band, ch);
1517 il->active.channel, ch);
1521 rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40, ctrl_chan_high,
1528 return il_send_cmd_pdu(il, C_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1535 il4965_txq_update_byte_cnt_tbl(struct il_priv *il, struct il_tx_queue *txq,
1538 struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr;
1562 il4965_hw_get_temperature(struct il_priv *il)
1569 if (test_bit(S_TEMPERATURE, &il->status) &&
1570 (il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK)) {
1572 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[1]);
1573 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[1]);
1574 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[1]);
1575 R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]);
1578 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[0]);
1579 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[0]);
1580 R3 = (s32) le32_to_cpu(il->card_alive_init.therm_r3[0]);
1581 R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]);
1591 if (!test_bit(S_TEMPERATURE, &il->status))
1595 (il->_4965.stats.general.common.temperature),
1627 * Assumes caller will replace il->last_temperature once calibration
1631 il4965_is_temp_calib_needed(struct il_priv *il)
1635 if (!test_bit(S_STATS, &il->status)) {
1640 temp_diff = il->temperature - il->last_temperature;
1662 il4965_temperature_calib(struct il_priv *il)
1666 temp = il4965_hw_get_temperature(il);
1670 if (il->temperature != temp) {
1671 if (il->temperature)
1673 kelvin_to_celsius(il->temperature),
1680 il->temperature = temp;
1681 set_bit(S_TEMPERATURE, &il->status);
1683 if (!il->disable_tx_power_cal &&
1684 unlikely(!test_bit(S_SCANNING, &il->status)) &&
1685 il4965_is_temp_calib_needed(il))
1686 queue_work(il->workqueue, &il->txpower_work);
1721 il4965_post_scan(struct il_priv *il)
1727 if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
1728 il_commit_rxon(il);
1732 il4965_post_associate(struct il_priv *il)
1734 struct ieee80211_vif *vif = il->vif;
1737 if (!vif || !il->is_open)
1740 if (test_bit(S_EXIT_PENDING, &il->status))
1743 il_scan_cancel_timeout(il, 200);
1745 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1746 il_commit_rxon(il);
1748 ret = il_send_rxon_timing(il);
1752 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
1754 il_set_rxon_ht(il, &il->current_ht_config);
1756 if (il->ops->set_rxon_chain)
1757 il->ops->set_rxon_chain(il);
1759 il->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
1765 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1767 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1769 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
1771 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
1773 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1776 il_commit_rxon(il);
1779 il->active.bssid_addr);
1785 il4965_send_beacon_cmd(il);
1796 if (il->chain_noise_data.state == IL_CHAIN_NOISE_DONE)
1797 il_power_update_mode(il, false);
1800 il4965_chain_noise_reset(il);
1801 il->start_calib = 1;
1805 il4965_config_ap(struct il_priv *il)
1807 struct ieee80211_vif *vif = il->vif;
1810 lockdep_assert_held(&il->mutex);
1812 if (test_bit(S_EXIT_PENDING, &il->status))
1816 if (!il_is_associated(il)) {
1819 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1820 il_commit_rxon(il);
1823 ret = il_send_rxon_timing(il);
1829 il->chain_noise_data.active_chains = il->hw_params.valid_rx_ant;
1830 il_set_rxon_ht(il, &il->current_ht_config);
1831 if (il->ops->set_rxon_chain)
1832 il->ops->set_rxon_chain(il);
1834 il->staging.assoc_id = 0;
1837 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1839 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1841 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
1843 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
1845 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
1848 il4965_send_beacon_cmd(il);
1850 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
1851 il_commit_rxon(il);
1853 il4965_send_beacon_cmd(il);