Lines Matching defs:tmp
684 u32 tmp;
696 tmp = (u32) (mac_bssid[i + 0]);
697 tmp |= (u32) (mac_bssid[i + 1]) << 8;
698 tmp |= (u32) (mac_bssid[i + 2]) << 16;
699 tmp |= (u32) (mac_bssid[i + 3]) << 24;
700 b43_ram_write(dev, 0x20 + i, tmp);
1114 u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, offset + i);
1115 printk("%02X%02X", (tmp & 0xFF), ((tmp >> 8) & 0xFF));
1127 u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, offset + i);
1128 printk("%02X%02X", (tmp & 0xFF), ((tmp >> 8) & 0xFF));
1261 u16 tmp;
1263 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
1264 tmp &= ~B43_BCMA_IOCTL_DAC;
1265 tmp |= 0x100;
1266 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
1268 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
1269 tmp &= ~B43_BCMA_IOCTL_PHY_CLKEN;
1270 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
1272 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
1273 tmp |= B43_BCMA_IOCTL_PHY_CLKEN;
1274 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
1336 u16 tmp;
1348 tmp = (v0 & 0x0000FFFF);
1349 stat.frame_count = ((tmp & 0xF000) >> 12);
1350 stat.rts_count = ((tmp & 0x0F00) >> 8);
1351 stat.supp_reason = ((tmp & 0x001C) >> 2);
1352 stat.pm_indicated = !!(tmp & 0x0080);
1353 stat.intermediate = !!(tmp & 0x0040);
1354 stat.for_ampdu = !!(tmp & 0x0020);
1355 stat.acked = !!(tmp & 0x0002);
1421 u16 tmp;
1469 tmp = b43_shm_read16(dev, B43_SHM_SHARED, 0x40C);
1470 tmp = (tmp / 128) & 0x1F;
1471 if (tmp >= 8)
1475 if (tmp == 8)
1512 u32 tmp;
1517 tmp = b43_read32(dev, B43_MMIO_PS_STATUS);
1518 if (!(tmp & 0x00000008))
1530 u32 i, tmp;
1540 tmp = (u32) (data[0]) << 16;
1541 tmp |= (u32) (data[1]) << 24;
1542 b43_ram_write(dev, ram_offset, tmp);
1545 tmp = (u32) (data[i + 0]);
1547 tmp |= (u32) (data[i + 1]) << 8;
1549 tmp |= (u32) (data[i + 2]) << 16;
1551 tmp |= (u32) (data[i + 3]) << 24;
1552 b43_ram_write(dev, ram_offset + i - 2, tmp);
1916 u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, i);
1917 buf[i / 2] = cpu_to_le16(tmp);
1929 u16 tmp = b43_shm_read16(dev, B43_SHM_SCRATCH, i);
1932 printk("r%02u: 0x%04X ", i, tmp);
2613 u32 tmp, macctl;
2659 tmp = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
2660 if (tmp == B43_IRQ_MAC_SUSPENDED)
2980 u32 tmp;
2991 tmp = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
2992 if (tmp & B43_IRQ_MAC_SUSPENDED)
2998 tmp = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON);
2999 if (tmp & B43_IRQ_MAC_SUSPENDED)
3012 u32 tmp;
3017 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
3019 tmp |= B43_BCMA_IOCTL_MACPHYCLKEN;
3021 tmp &= ~B43_BCMA_IOCTL_MACPHYCLKEN;
3022 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
3027 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
3029 tmp |= B43_TMSLOW_MACPHYCLKEN;
3031 tmp &= ~B43_TMSLOW_MACPHYCLKEN;
3032 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
3213 u16 tmp;
3218 tmp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_ACKCTSPHYCTL);
3219 tmp = (tmp & ~B43_TXH_PHY_ANT) | ant;
3220 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_ACKCTSPHYCTL, tmp);
3222 tmp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_PRPHYCTL);
3223 tmp = (tmp & ~B43_TXH_PHY_ANT) | ant;
3224 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRPHYCTL, tmp);
3651 int bslots, tmp;
3671 tmp = b43_shm_read16(dev, B43_SHM_SHARED,
3674 tmp |= 0x100;
3677 tmp);
3887 u32 tmp;
3925 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL);
3927 tmp |= B43_BCMA_IOCTL_GMODE;
3929 tmp &= ~B43_BCMA_IOCTL_GMODE;
3930 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp);
3935 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW);
3937 tmp |= B43_TMSLOW_GMODE;
3939 tmp &= ~B43_TMSLOW_GMODE;
3940 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp);
4472 u32 tmp;
4483 tmp = b43_read16(dev, B43_MMIO_PHY_VER);
4484 analog_type = (tmp & B43_PHYVER_ANALOG) >> B43_PHYVER_ANALOG_SHIFT;
4485 phy_type = (tmp & B43_PHYVER_TYPE) >> B43_PHYVER_TYPE_SHIFT;
4486 phy_rev = (tmp & B43_PHYVER_VERSION);
4557 for (tmp = 0; tmp < 3; tmp++) {
4558 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, tmp);
4559 radio24[tmp] = b43_read16(dev, B43_MMIO_RADIO24_DATA);
4569 tmp = 0x3205017F;
4571 tmp = 0x4205017F;
4573 tmp = 0x5205017F;
4577 tmp = b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
4580 tmp |= b43_read16(dev, B43_MMIO_RADIO_DATA_HIGH) << 16;
4582 radio_manuf = (tmp & 0x00000FFF);
4583 radio_id = (tmp & 0x0FFFF000) >> 12;
4584 radio_rev = (tmp & 0xF0000000) >> 28;
4718 u32 tmp;
4731 tmp = ssb_read32(dev->dev->sdev, SSB_IMCFGLO);
4732 tmp &= ~SSB_IMCFGLO_REQTO;
4733 tmp &= ~SSB_IMCFGLO_SERTO;
4734 tmp |= 0x3;
4735 ssb_write32(dev->dev->sdev, SSB_IMCFGLO, tmp);
5370 u32 tmp;
5392 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOST);
5393 have_2ghz_phy = !!(tmp & B43_BCMA_IOST_2G_PHY);
5394 have_5ghz_phy = !!(tmp & B43_BCMA_IOST_5G_PHY);
5400 tmp = ssb_read32(dev->dev->sdev, SSB_TMSHIGH);
5401 have_2ghz_phy = !!(tmp & B43_TMSHIGH_HAVE_2GHZ_PHY);
5402 have_5ghz_phy = !!(tmp & B43_TMSHIGH_HAVE_5GHZ_PHY);