Lines Matching refs:isr
288 u32 isr;
293 isr = wil_ioread32_and_clear(wil->csr +
297 trace_wil6210_irq_rx(isr);
298 wil_dbg_irq(wil, "ISR RX 0x%08x\n", isr);
300 if (unlikely(!isr)) {
312 if (likely(isr & (BIT_DMA_EP_RX_ICR_RX_DONE |
315 isr);
317 isr &= ~(BIT_DMA_EP_RX_ICR_RX_DONE |
334 if (unlikely(isr))
335 wil_err(wil, "un-handled RX ISR bits 0x%08x\n", isr);
350 u32 isr;
355 isr = wil_ioread32_and_clear(wil->csr +
359 trace_wil6210_irq_rx(isr);
360 wil_dbg_irq(wil, "ISR RX 0x%08x\n", isr);
362 if (unlikely(!isr)) {
368 if (likely(isr & BIT_RX_STATUS_IRQ)) {
370 isr &= ~BIT_RX_STATUS_IRQ;
385 if (unlikely(isr))
386 wil_err(wil, "un-handled RX ISR bits 0x%08x\n", isr);
401 u32 isr;
406 isr = wil_ioread32_and_clear(wil->csr +
410 trace_wil6210_irq_tx(isr);
411 wil_dbg_irq(wil, "ISR TX 0x%08x\n", isr);
413 if (unlikely(!isr)) {
419 if (likely(isr & BIT_TX_STATUS_IRQ)) {
421 isr &= ~BIT_TX_STATUS_IRQ;
431 if (unlikely(isr))
432 wil_err(wil, "un-handled TX ISR bits 0x%08x\n", isr);
447 u32 isr;
452 isr = wil_ioread32_and_clear(wil->csr +
456 trace_wil6210_irq_tx(isr);
457 wil_dbg_irq(wil, "ISR TX 0x%08x\n", isr);
459 if (unlikely(!isr)) {
465 if (likely(isr & BIT_DMA_EP_TX_ICR_TX_DONE)) {
467 isr &= ~BIT_DMA_EP_TX_ICR_TX_DONE;
469 isr &= ~(BIT(25) - 1UL);
479 if (unlikely(isr))
481 isr);
536 u32 isr;
540 isr = wil_ioread32_and_clear(wil->csr +
544 trace_wil6210_irq_misc(isr);
545 wil_dbg_irq(wil, "ISR MISC 0x%08x\n", isr);
547 if (!isr) {
553 if (isr & ISR_MISC_FW_ERROR) {
563 * do not clear @isr here - we do 2-nd part in thread
569 if (isr & ISR_MISC_FW_READY) {
578 isr &= ~ISR_MISC_FW_READY;
581 if (isr & BIT_DMA_EP_MISC_ICR_HALP) {
582 isr &= ~BIT_DMA_EP_MISC_ICR_HALP;
592 wil->isr_misc = isr;
594 if (isr) {
605 u32 isr = wil->isr_misc;
607 trace_wil6210_irq_misc_thread(isr);
608 wil_dbg_irq(wil, "Thread ISR MISC 0x%08x\n", isr);
610 if (isr & ISR_MISC_FW_ERROR) {
614 isr &= ~ISR_MISC_FW_ERROR;
623 if (isr & ISR_MISC_MBOX_EVT) {
626 isr &= ~ISR_MISC_MBOX_EVT;
629 if (isr)
630 wil_dbg_irq(wil, "un-handled MISC ISR bits 0x%08x\n", isr);