Lines Matching refs:config
399 ah->config.dma_beacon_response_time = 1;
400 ah->config.sw_beacon_response_time = 6;
401 ah->config.cwm_ignore_extcca = false;
402 ah->config.analog_shiftreg = 1;
404 ah->config.rx_intr_mitigation = true;
407 ah->config.rimt_last = 500;
408 ah->config.rimt_first = 2000;
410 ah->config.rimt_last = 250;
411 ah->config.rimt_first = 700;
415 ah->config.pll_pwrsave = 7;
434 ah->config.serialize_regmode = SER_REG_MODE_AUTO;
436 if (NR_CPUS > 1 && ah->config.serialize_regmode == SER_REG_MODE_AUTO) {
440 ah->config.serialize_regmode = SER_REG_MODE_ON;
442 ah->config.serialize_regmode = SER_REG_MODE_OFF;
447 ah->config.serialize_regmode);
450 ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD >> 1;
452 ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD;
949 if (ah->config.rx_intr_mitigation) {
957 if (ah->config.rx_intr_mitigation) {
966 if (ah->config.tx_intr_mitigation) {
2024 if (ah->config.rx_intr_mitigation) {
2025 REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, ah->config.rimt_last);
2026 REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, ah->config.rimt_first);
2029 if (ah->config.tx_intr_mitigation) {
2072 if (ah->config.hw_hang_checks & HW_PHYRESTART_CLC_WAR)
2300 TU_TO_USEC(ah->config.dma_beacon_response_time));
2302 TU_TO_USEC(ah->config.sw_beacon_response_time));
3071 if (IS_CHAN_HT40(chan) && !ah->config.cwm_ignore_extcca)