Lines Matching refs:ee
283 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
288 if ((AR5K_EEPROM_HAS32KHZCRYSTAL(ee->ee_misc1) ||
289 AR5K_EEPROM_HAS32KHZCRYSTAL_OLD(ee->ee_misc1)) &&
348 else if (ee->ee_is_hb63)
979 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
992 ((ee->ee_cck_ofdm_power_delta -
993 ee->ee_scaled_cck_delta) * 2) / 10;
996 (ee->ee_cck_ofdm_power_delta * 2) / 10;
1003 AR5K_REG_SM((ee->ee_cck_ofdm_gain_delta * -1),
1015 ee->ee_cck_ofdm_gain_delta;
1024 AR5K_PHY_NF_SVAL(ee->ee_noise_floor_thr[ee_mode]),
1032 ee->ee_switch_settling_turbo[ee_mode]);
1037 ee->ee_atn_tx_rx_turbo[ee_mode]);
1042 ee->ee_adc_desired_size_turbo[ee_mode]);
1046 ee->ee_pga_desired_size_turbo[ee_mode]);
1051 ee->ee_margin_tx_rx_turbo[ee_mode]);
1057 ee->ee_switch_settling[ee_mode]);
1062 ee->ee_atn_tx_rx[ee_mode]);
1067 ee->ee_adc_desired_size[ee_mode]);
1071 ee->ee_pga_desired_size[ee_mode]);
1077 ee->ee_margin_tx_rx[ee_mode]);
1082 (ee->ee_tx_end2xpa_disable[ee_mode] << 24) |
1083 (ee->ee_tx_end2xpa_disable[ee_mode] << 16) |
1084 (ee->ee_tx_frm2xpa_enable[ee_mode] << 8) |
1085 (ee->ee_tx_frm2xpa_enable[ee_mode]), AR5K_PHY_RF_CTL4);
1090 ee->ee_tx_end2xlna_enable[ee_mode]);
1095 ee->ee_thr_62[ee_mode]);
1104 ee->ee_false_detect[ee_mode]);
1114 ee->ee_i_cal[ee_mode]);
1116 ee->ee_q_cal[ee_mode]);