Lines Matching defs:data
71 u32 data;
74 data = ath5k_hw_reg_read(ah, reg);
75 if (is_set && (data & flag))
77 else if ((data & flag) == val)
205 * Set default Tx frame to Tx data start delay
259 /* On 5112 set tx frame to tx data start delay */
518 u32 staid, data;
551 data = ath5k_hw_reg_read(ah, AR5K_SLEEP_CTL);
556 if (data & 0xffc00000)
557 data = 0;
560 data = data & ~AR5K_SLEEP_CTL_SLE;
562 ath5k_hw_reg_write(ah, data | AR5K_SLEEP_CTL_SLE_WAKE,
574 ath5k_hw_reg_write(ah, data | AR5K_SLEEP_CTL_SLE_WAKE,
906 u32 data;
910 data = 0xffb81020;
912 data = 0xffb80d20;
913 ath5k_hw_reg_write(ah, data, AR5K_PHY_FRAME_CTL);
973 * based on various infos and per-mode calibration data.